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Searched refs:RTC_DIV0 (Results 1 – 4 of 4) sorted by relevance

/titanic_50/usr/src/uts/common/sys/
H A Drtc.h59 #define RTC_DIV0 0x00 /* Time base of 4.194304 MHz */ macro
/titanic_50/usr/src/uts/sun4u/sys/
H A Dtodm5819.h76 #define RTC_DIV0 0x10 /* Bank Select */ macro
H A Dtodds1287.h98 #define RTC_DIV0 0x10 /* Bank Select */ macro
/titanic_50/usr/src/uts/sun4u/io/
H A Dtodds1287.c1169 rega = rega & ~(RTC_DIV0 | RTC_DIV1 | RTC_DIV2); in select_bank()
1175 banksel = RTC_DIV0 | RTC_DIV1; in select_bank()