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Searched refs:REG_SPI4_ING_SETUP0 (Results 1 – 4 of 4) sorted by relevance

/titanic_50/usr/src/uts/common/io/chxge/com/
H A Dvsc7321.c121 { REG_SPI4_ING_SETUP0, 0x0011100f }, /* FIXME: Multiport */
H A Dvsc7321_reg.h129 #define REG_SPI4_ING_SETUP0 CRA(0x5,0x0,0x02) /* Ingress Status Channel Setup */ macro
H A Dvsc7326_reg.h135 #define REG_SPI4_ING_SETUP0 CRA(0x5,0x0,0x02) /* Ingress Status Channel Setup */ macro
H A Dvsc7326.c124 { REG_SPI4_ING_SETUP0, 0x04111004 },