Searched refs:REG_INTERRUPT_ENABLE (Results 1 – 3 of 3) sorted by relevance
/titanic_50/usr/src/uts/common/sys/fibre-channel/fca/qlge/ |
H A D | qlge_hw.h | 1071 #define REG_INTERRUPT_ENABLE 0x34 macro 1125 REG_INTERRUPT_ENABLE,\ 1128 REG_INTERRUPT_ENABLE, \ 1136 ql_put32(qlge, REG_INTERRUPT_ENABLE, \ 1142 REG_INTERRUPT_ENABLE, (0x40000000u)); \
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/titanic_50/usr/src/uts/common/io/fibre-channel/fca/qlge/ |
H A D | qlge.c | 778 ql_write_reg(qlge, REG_INTERRUPT_ENABLE, in ql_enable_global_interrupt() 789 ql_write_reg(qlge, REG_INTERRUPT_ENABLE, (INTR_EN_EI << 16)); in ql_disable_global_interrupt() 809 ql_write_reg(qlge, REG_INTERRUPT_ENABLE, ctx->intr_en_mask); in ql_enable_completion_interrupt() 815 ql_write_reg(qlge, REG_INTERRUPT_ENABLE, ctx->intr_en_mask); in ql_enable_completion_interrupt() 838 ql_write_reg(qlge, REG_INTERRUPT_ENABLE, ctx->intr_dis_mask); in ql_forced_disable_completion_interrupt() 844 ql_write_reg(qlge, REG_INTERRUPT_ENABLE, ctx->intr_dis_mask); in ql_forced_disable_completion_interrupt() 871 ql_write_reg(qlge, REG_INTERRUPT_ENABLE, ctx->intr_dis_mask); in ql_disable_completion_interrupt() 6141 (knp++)->value.ui32 = ql_read_reg(qlge, REG_INTERRUPT_ENABLE); in ql_kstats_get_reg_and_dev_stats()
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H A D | qlge_dbg.c | 803 if (i == REG_INTERRUPT_ENABLE) { in read_ctrl_reg_set() 1815 ql_write_reg(qlge, REG_INTERRUPT_ENABLE, 0x037f0300 + i); in ql_get_intr_states() 1816 *buf = ql_read_reg(qlge, REG_INTERRUPT_ENABLE); in ql_get_intr_states()
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