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Searched refs:RDC_STAT (Results 1 – 3 of 3) sorted by relevance

/titanic_50/usr/src/uts/common/io/hxge/
H A Dhpi_rxdma.c533 RXDMA_REG_READ64(handle, RDC_STAT, channel, &cs.value); in hpi_rxdma_channel_rbr_empty_clear()
535 RXDMA_REG_WRITE64(handle, RDC_STAT, channel, cs.value); in hpi_rxdma_channel_rbr_empty_clear()
558 RXDMA_REG_READ64(handle, RDC_STAT, channel, &cs_p->value); in hpi_rxdma_control_status()
562 RXDMA_REG_WRITE64(handle, RDC_STAT, channel, cs_p->value); in hpi_rxdma_control_status()
566 RXDMA_REG_READ64(handle, RDC_STAT, channel, &cs.value); in hpi_rxdma_control_status()
567 RXDMA_REG_WRITE64(handle, RDC_STAT, channel, in hpi_rxdma_control_status()
H A Dhxge_rxdma.c1137 RXDMA_REG_READ64(handle, RDC_STAT, channel, &cs.value); in hxge_rx_intr()
1140 RXDMA_REG_WRITE64(handle, RDC_STAT, channel, cs.value); in hxge_rx_intr()
1173 RXDMA_REG_WRITE64(handle, RDC_STAT, channel, cs.value); in hxge_rx_intr()
1308 RXDMA_REG_WRITE64(handle, RDC_STAT, ringp->rdc, cs.value); in hxge_disable_poll()
1365 RXDMA_REG_READ64(handle, RDC_STAT, rhp->index, &cs.value); in hxge_rx_poll()
1368 RXDMA_REG_WRITE64(handle, RDC_STAT, rhp->index, cs.value); in hxge_rx_poll()
1592 RXDMA_REG_WRITE64(handle, RDC_STAT, channel, pktcs.value); in hxge_rx_pkts()
3851 RXDMA_REG_WRITE64(HXGE_DEV_HPI_HANDLE(hxgep), RDC_STAT, in hxge_rbr_empty_restore()
H A Dhxge_rdc_hw.h52 #define RDC_STAT (RDC_BASE_ADDR + 0xC0) macro