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Searched refs:Phase (Results 1 – 7 of 7) sorted by relevance

/titanic_50/usr/src/cmd/sgs/libld/common/
H A Ddebug.c54 static int Phase = 0; variable
88 if (Phase == 0) in dbg_setup()
89 Phase = phase; in dbg_setup()
90 else if (Phase != phase) in dbg_setup()
/titanic_50/exception_lists/
H A Dpmodes32 # NWAM Phase 1 -- nwamd running as netadm:netadm must be able to
/titanic_50/usr/src/cmd/cmd-inet/etc/ike/
H A Dconfig.sample70 ## Phase 1 transform defaults...
/titanic_50/usr/src/uts/common/avs/ns/sdbc/
H A Ddynmem_readme.txt64 done in three phases. Phase one simply determines whether the caching request
66 in cache it is typed as eligible - i.e. needing memory allocation. Phase
/titanic_50/usr/src/data/hwdata/
H A Dusb.ids878 e0d0 Total Phase Aardvark I2C/SPI Host Adapter
15567 4757 Chris Pavlina (c4757p) WCP52 Gain/Phase Analyzer
17130 1679 Total Phase
21181 071 Phase
H A Dpci.ids16710 13c4 Phase Metrics
22654 1138 SCHD-PH-8 Phase detector
/titanic_50/usr/src/uts/intel/io/acpica/
H A Dchanges.txt16448 The parser/interpreter integration continues in Phase 5 with the