Searched refs:PX_INTR_STATE_DISABLE (Results 1 – 5 of 5) sorted by relevance
/titanic_50/usr/src/uts/sun4/io/px/ |
H A D | px_pec.c | 264 PX_ERR_LOW_PIL, PX_INTR_STATE_DISABLE, MSG_REC, in px_pec_msg_rem_intr() 281 PX_ERR_PIL, PX_INTR_STATE_DISABLE, MSG_REC, in px_pec_msg_rem_intr() 297 PX_ERR_PIL, PX_INTR_STATE_DISABLE, MSG_REC, PCIE_FATAL_MSG); in px_pec_msg_rem_intr()
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H A D | px_ib.h | 79 #define PX_INTR_STATE_DISABLE 0 /* disabled */ macro
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H A D | px_intr.c | 165 if (ih_p->ih_intr_state == PX_INTR_STATE_DISABLE) { in px_intx_intr() 524 hdlp->ih_vector, hdlp->ih_pri, PX_INTR_STATE_DISABLE, 0, 0); in px_intx_ops() 696 hdlp->ih_pri, PX_INTR_STATE_DISABLE, msiq_rec_type, in px_msix_ops()
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H A D | px.c | 707 PX_INTR_STATE_DISABLE, MSG_REC, PCIE_PME_ACK_MSG); in px_pwr_teardown()
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H A D | px_ib.c | 791 ih_p->ih_intr_state = PX_INTR_STATE_DISABLE; in px_ib_alloc_ih()
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