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Searched refs:PT_DRR_WT0_REG (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/common/sys/nxge/
H A Dnxge_rxdma_hw.h163 #define PT_DRR_WT0_REG (FZC_DMC + 0x00028) macro
/titanic_50/usr/src/uts/common/io/nxge/npi/
H A Dnpi_rxdma.c82 DEF_PT3_RDC_REG, RX_ADDR_MD_REG, PT_DRR_WT0_REG, PT_DRR_WT1_REG,