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Searched refs:PROCESSOR_ADDRESS_RDY (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/common/io/fibre-channel/fca/qlge/
H A Dqlge_mpi.c56 PROCESSOR_ADDRESS_RDY, BIT_SET, 0) != DDI_SUCCESS) { in ql_wait_processor_addr_reg_ready()
/titanic_50/usr/src/uts/common/sys/fibre-channel/fca/qlge/
H A Dqlge_hw.h538 #define PROCESSOR_ADDRESS_RDY (0x8000u<<16) macro