Home
last modified time | relevance | path

Searched refs:PM_LEVEL_D0 (Results 1 – 15 of 15) sorted by relevance

/titanic_50/usr/src/uts/common/io/pciex/
H A Dpcie_pwr.c121 ASSERT(level == PM_LEVEL_D0 || level == PM_LEVEL_D3 || in pcie_power()
198 case PM_LEVEL_D0: in pcie_pwr_change()
331 if (new_level < PM_LEVEL_D0 && !comp) { in pcie_bus_power()
373 if (new_level < PM_LEVEL_D0) in pcie_bus_power()
461 ASSERT(olevel >= PM_LEVEL_UNKNOWN && olevel <= PM_LEVEL_D0); in pwr_update_counters()
462 ASSERT(nlevel >= PM_LEVEL_UNKNOWN && nlevel <= PM_LEVEL_D0); in pwr_update_counters()
498 return (PM_LEVEL_D0); in pwr_level_allowed()
696 if (pwr_p->pwr_func_lvl == PM_LEVEL_D0) { in pcie_pm_hold()
701 if (pm_raise_power(dip, 0, PM_LEVEL_D0) != DDI_SUCCESS) { in pcie_pm_hold()
705 PM_LEVEL_D0); in pcie_pm_hold()
[all …]
H A Dpcieb.c1643 pwr_p->pwr_func_lvl = PM_LEVEL_D0; in pcieb_pwr_init_and_raise()
1663 if (pwr_p->pwr_func_lvl != PM_LEVEL_D0 && in pcieb_pwr_init_and_raise()
1664 ((ret = pm_raise_power(dip, 0, PM_LEVEL_D0)) != DDI_SUCCESS)) { in pcieb_pwr_init_and_raise()
1679 pwr_p->pwr_func_lvl = PM_LEVEL_D0; in pcieb_pwr_init_and_raise()
1698 pwr_p->pwr_func_lvl = PM_LEVEL_D0; in pcieb_pwr_disable()
/titanic_50/usr/src/uts/common/sys/
H A Dpcie_pwr.h37 #define PCIE_D0_INDEX PM_LEVEL_D0
38 #define PCIE_UNKNOWN_INDEX PM_LEVEL_D0 + 1
H A Dsunpm.h91 #define PM_LEVEL_D0 3 /* D0 state - fully on */ macro
/titanic_50/usr/src/uts/intel/io/dktp/controller/ata/
H A Data_common.c625 if (ata_ctlp->ac_pm_level != PM_LEVEL_D0) { in ata_detach()
626 if (ATA_RAISE_POWER(dip, 0, PM_LEVEL_D0) != in ata_detach()
3532 ata_ctlp->ac_pm_level = PM_LEVEL_D0; in ata_init_pm()
3535 if (ATA_RAISE_POWER(dip, 0, PM_LEVEL_D0) != DDI_SUCCESS) { in ata_init_pm()
3600 if (ata_ctlp->ac_pm_level == PM_LEVEL_D0) in ata_resume()
3604 if (ATA_RAISE_POWER(dip, 0, PM_LEVEL_D0) == DDI_FAILURE) in ata_resume()
3612 ata_ctlp->ac_pm_level = PM_LEVEL_D0; in ata_resume()
3673 case PM_LEVEL_D0: in ata_power()
3676 ata_ctlp->ac_pm_level = PM_LEVEL_D0; in ata_power()
/titanic_50/usr/src/uts/sun4u/io/pci/
H A Dpci_pwr.c224 case PM_LEVEL_D0: in pci_pwr_update_comp()
255 case PM_LEVEL_D0: in pci_pwr_update_comp()
/titanic_50/usr/src/uts/common/io/sata/adapters/si3124/
H A Dsi3124.c711 si_ctlp->sictl_power_level = PM_LEVEL_D0; in si_attach()
727 (void) pm_power_has_changed(dip, 0, PM_LEVEL_D0); in si_attach()
748 si_ctlp->sictl_power_level = PM_LEVEL_D0; in si_attach()
883 PM_LEVEL_D0); in si_detach()
932 case PM_LEVEL_D0: /* fully on */ in si_power()
938 si_ctlp->sictl_power_level = PM_LEVEL_D0; in si_power()
/titanic_50/usr/src/cmd/mdb/common/modules/mpt_sas/
H A Dmpt_sas.c897 case PM_LEVEL_D0: in mptsas_dcmd()
/titanic_50/usr/src/uts/common/io/scsi/adapters/mpt_sas/
H A Dmptsas.c1119 rval = pm_power_has_changed(dip, 0, PM_LEVEL_D0); in mptsas_attach()
1746 (mpt->m_power_level != PM_LEVEL_D0)) { in mptsas_suspend()
1913 if (mpt->m_power_level != PM_LEVEL_D0) { in mptsas_do_detach()
1914 if (pm_raise_power(dip, 0, PM_LEVEL_D0) != in mptsas_do_detach()
2442 case PM_LEVEL_D0: in mptsas_power()
2469 mpt->m_power_level = PM_LEVEL_D0; in mptsas_power()
5906 (mpt->m_power_level != PM_LEVEL_D0)) { in mptsas_intr()
10126 if (mpt->m_power_level == PM_LEVEL_D0) { in mptsas_watch()
12856 if (mpt->m_power_level != PM_LEVEL_D0) { in mptsas_ioctl()
12858 if (pm_raise_power(mpt->m_dip, 0, PM_LEVEL_D0) != in mptsas_ioctl()
[all …]
/titanic_50/usr/src/uts/common/io/fibre-channel/fca/qlc/
H A Dql_api.c1326 ha->power_level = PM_LEVEL_D0; in ql_attach()
1336 PM_LEVEL_D0) != DDI_SUCCESS) { in ql_attach()
1344 ha->power_level = PM_LEVEL_D0; in ql_attach()
1668 PM_LEVEL_D0) != DDI_SUCCESS) { in ql_attach()
1679 ha->power_level = PM_LEVEL_D0; in ql_attach()
2093 if (component != QL_POWER_COMPONENT || (level != PM_LEVEL_D0 && in ql_power()
2109 case PM_LEVEL_D0: /* power up to D0 state - fully on */ in ql_power()
2112 if (ha->power_level == PM_LEVEL_D0) { in ql_power()
2122 ha->power_level = PM_LEVEL_D0; in ql_power()
3265 if (ha->power_level != PM_LEVEL_D0) { in ql_ub_alloc()
[all …]
H A Dql_ioctl.c351 if (ha->power_level != PM_LEVEL_D0) { in ql_busy_notification()
H A Dql_isr.c177 if (ha->power_level != PM_LEVEL_D0) { in ql_isr_aif()
H A Dql_xioctl.c409 ha->power_level != PM_LEVEL_D0) { in ql_sdm_ioctl()
/titanic_50/usr/src/uts/sun4/io/px/
H A Dpx.c634 pwr_p->pwr_func_lvl = PM_LEVEL_D0; in px_pwr_setup()
/titanic_50/usr/src/uts/common/io/1394/targets/scsa1394/
H A Dhba.c323 (void) pm_raise_power(dip, 0, PM_LEVEL_D0); in scsa1394_attach()