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Searched refs:PCI_SBUF_LINE_SIZE (Results 1 – 3 of 3) sorted by relevance

/titanic_50/usr/src/uts/sun4u/sys/pci/
H A Dpci_sc.h78 #define PCI_SBUF_LINE_SIZE 64 /* size of i/o cache line */ macro
80 #define PCI_CACHE_LINE_SIZE (PCI_SBUF_LINE_SIZE / 4)
/titanic_50/usr/src/uts/common/io/cardbus/
H A Dcardbus.c969 #ifdef PCI_SBUF_LINE_SIZE in cardbus_ctlops()
970 val = maxbit(val, PCI_SBUF_LINE_SIZE); in cardbus_ctlops()
/titanic_50/usr/src/uts/sun4u/io/pci/
H A Dpci.c1233 val = maxbit(val, PCI_SBUF_LINE_SIZE); in pci_ctlops()