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Searched refs:PCI_CONF_STAT (Results 1 – 25 of 39) sorted by relevance

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/titanic_50/usr/src/uts/common/io/
H A Dpci_cap.c61 status = pci_config_get16(h, PCI_CONF_STAT); in pci_cap_probe()
130 status = pci_config_get16(h, PCI_CONF_STAT); in pci_lcap_locate()
173 status = pci_config_get16(h, PCI_CONF_STAT); in pci_xcap_locate()
212 status = pci_config_get16(h, PCI_CONF_STAT); in pci_htcap_locate()
H A Dpci_intr_lib.c1038 statreg = pci_config_get16(cfg_hdl, PCI_CONF_STAT); in pci_intx_get_cap()
1151 statreg = pci_config_get16(cfg_hdl, PCI_CONF_STAT); in pci_intx_get_pending()
/titanic_50/usr/src/uts/sun4v/io/px/
H A Dpx_libhv.c67 uint16_t offset = PCI_CONF_STAT; in hvio_rp_mps()
/titanic_50/usr/src/uts/common/io/cardbus/
H A Dcardbus_cfg.c3659 PCI_CONF_STAT) & PCI_STAT_DEVSELT) >> 9;
3672 pci_config_get16(config_handle, PCI_CONF_STAT) & PCI_STAT_FBBC) {
3679 if (pci_config_get16(config_handle, PCI_CONF_STAT) & PCI_STAT_66MHZ) {
3685 if (pci_config_get16(config_handle, PCI_CONF_STAT) & PCI_STAT_UDF) {
4002 stat = pci_config_get16(config_handle, PCI_CONF_STAT);
4030 stat = pci_config_get16(config_handle, PCI_CONF_STAT);
4079 stat = pci_config_get16(config_handle, PCI_CONF_STAT);
4122 pci_config_put16(config_handle, PCI_CONF_STAT, stat);
4160 pci_config_get16(config_handle, PCI_CONF_STAT), comm, bctrl);
4192 pci_config_get16(config_handle, PCI_CONF_STAT), comm, bctrl);
[all …]
/titanic_50/usr/src/uts/intel/io/pciex/
H A Dpcie_nvidia.c61 status = (*pci_getw_func)(bus, dev, func, PCI_CONF_STAT); in check_if_device_is_pciex()
/titanic_50/usr/src/uts/common/os/
H A Dsunpci.c418 status = pci_config_get16(confhdl, PCI_CONF_STAT);
593 status = pci_config_get16(confhdl, PCI_CONF_STAT);
944 status = pci_config_get16(conf_hdl, PCI_CONF_STAT);
H A Dpcifm.c204 PCI_CONF_STAT); in pci_regs_gather()
319 pci_config_put16(erpt_p->pe_hdl, PCI_CONF_STAT, in pci_regs_clear()
431 pci_status = pci_config_get16(erpt_p->pe_hdl, PCI_CONF_STAT); in pci_ereport_setup()
/titanic_50/usr/src/uts/common/io/igb/
H A Digb_debug.c72 pci_config_get16(handle, PCI_CONF_STAT)); in pci_dump()
/titanic_50/usr/src/uts/common/sys/
H A Dpci.h40 #define PCI_CONF_STAT 0x6 /* status register, 2 bytes */ macro
/titanic_50/usr/src/uts/common/io/pciex/
H A Dpcie.c521 reg16 = PCIE_GET(16, bus_p, PCI_CONF_STAT); in pcie_initchild()
522 PCIE_PUT(16, bus_p, PCI_CONF_STAT, reg16); in pcie_initchild()
993 status = pci_cfgacc_get16(rcdip, bdf, PCI_CONF_STAT); in pcie_init_bus()
H A Dpcie_fault.c668 pci_regs->pci_err_status = PCIE_GET(16, bus_p, PCI_CONF_STAT); in pf_pci_regs_gather()
791 PCIE_PUT(16, bus_p, PCI_CONF_STAT, pfd_p->pe_pci_regs->pci_err_status); in pf_pci_regs_clear()
/titanic_50/usr/src/uts/common/io/e1000g/
H A De1000g_debug.c392 pci_config_get16(handle, PCI_CONF_STAT)); in pciconfig_dump()
/titanic_50/usr/src/uts/common/io/ixgbe/
H A Dixgbe_debug.c197 pci_config_get16(handle, PCI_CONF_STAT)); in ixgbe_pci_dump()
/titanic_50/usr/src/uts/intel/io/agpmaster/
H A Dagpmaster.c569 value = (uint8_t)(pci_config_get16(acc_handle, PCI_CONF_STAT) in agpmaster_cap_find()
/titanic_50/usr/src/uts/common/io/yge/
H A Dyge.c713 status = pci_config_get16(pcih, PCI_CONF_STAT); in yge_reset()
718 pci_config_put16(pcih, PCI_CONF_STAT, status); in yge_reset()
1163 if ((pci_config_get16(pcih, PCI_CONF_STAT) & PCI_STAT_CAP) == 0) { in yge_find_capability()
2116 v16 = pci_config_get16(dev->d_pcih, PCI_CONF_STAT); in yge_intr_hwerr()
2118 pci_config_put16(dev->d_pcih, PCI_CONF_STAT, v16 | in yge_intr_hwerr()
/titanic_50/usr/src/uts/sun4/io/
H A Dpcicfg.c432 pci_config_get16(config_handle, PCI_CONF_STAT)); in pcicfg_dump_common_config()
3460 PCI_CONF_STAT) & PCI_STAT_DEVSELT) >> 9; in pcicfg_set_standard_props()
3472 (pci_config_get16(config_handle, PCI_CONF_STAT) & in pcicfg_set_standard_props()
3480 (pci_config_get16(config_handle, PCI_CONF_STAT) & in pcicfg_set_standard_props()
3487 if (pci_config_get16(config_handle, PCI_CONF_STAT) & PCI_STAT_UDF) { in pcicfg_set_standard_props()
3958 pci_config_put16(h, PCI_CONF_STAT, PCI_STAT_S_TARG_AB| in pcicfg_disable_bridge_probe_err()
3988 pci_config_put16(h, PCI_CONF_STAT, PCI_STAT_S_TARG_AB| in pcicfg_enable_bridge_probe_err()
/titanic_50/usr/src/uts/intel/io/hotplug/pcicfg/
H A Dpcicfg.c403 pci_config_get16(config_handle, PCI_CONF_STAT)); in pcicfg_dump_common_config()
3237 val = (pci_config_get16(config_handle, PCI_CONF_STAT) & in pcicfg_set_standard_props()
3250 (pci_config_get16(config_handle, PCI_CONF_STAT) & PCI_STAT_FBBC)) { in pcicfg_set_standard_props()
3257 (pci_config_get16(config_handle, PCI_CONF_STAT) & PCI_STAT_66MHZ)) { in pcicfg_set_standard_props()
3263 if (pci_config_get16(config_handle, PCI_CONF_STAT) & PCI_STAT_UDF) { in pcicfg_set_standard_props()
/titanic_50/usr/src/uts/intel/io/agpgart/
H A Dagptarget.c133 value = (uint8_t)(pci_config_get16(pci_handle, PCI_CONF_STAT) in agp_target_cap_find()
/titanic_50/usr/src/uts/common/io/audio/drv/audiots/
H A Daudiots.c589 if ((pci_config_get16(pcih, PCI_CONF_STAT) & PCI_STAT_CAP) == 0) { in audiots_power_up()
/titanic_50/usr/src/uts/common/io/drm/
H A Ddrm_sunmod.c996 if ((pci_config_get16(mstate->mis_cfg_hdl, PCI_CONF_STAT) & in drm_supp_device_capability()
/titanic_50/usr/src/uts/sun4u/io/pci/
H A Dsimba.c794 pci_config_put16(config_handle, PCI_CONF_STAT, 0xffff); in simba_initchild()
/titanic_50/usr/src/uts/intel/io/pci/
H A Dpci_boot.c829 status = pci_getw(bus, dev, func, PCI_CONF_STAT); in get_pci_cap()
1833 status = pci_getw(bus, dev, func, PCI_CONF_STAT); in set_devpm_d0()
2017 status = pci_getw(bus, dev, func, PCI_CONF_STAT); in process_devfunc()
/titanic_50/usr/src/uts/sun4u/io/
H A Dsbbc.c996 stat = pci_config_get16(conf_handle, PCI_CONF_STAT); in sbbc_config4pci()
/titanic_50/usr/src/cmd/pcitool/
H A Dpcitool.c263 { PCI_CONF_STAT, 2, "Stat", "Status" },
/titanic_50/usr/src/uts/common/io/nge/
H A Dnge_chip.c668 pci_config_put16(handle, PCI_CONF_STAT, ~0); in nge_chip_cfg_init()

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