| /titanic_50/usr/src/uts/sun4/io/px/ |
| H A D | px_tools.c | 63 PCI_CONF_ROM
558 (cfg_prg.offset != PCI_CONF_ROM)) { in pxtool_get_bar()
572 (cfg_prg.offset != PCI_CONF_ROM)) { in pxtool_get_bar()
602 } else if (cfg_prg.offset == PCI_CONF_ROM) { /* ROM requested */ in pxtool_get_bar()
721 if ((PCI_BAR_OFFSET(prg) == PCI_CONF_ROM) && (write_flag)) { in pxtool_dev_reg_ops()
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| /titanic_50/usr/src/uts/sun4/io/ |
| H A D | pcicfg.c | 476 pci_config_get32(config_handle, PCI_CONF_ROM)); in pcicfg_dump_device_config()
2941 (PCI_REG_REG_G(assigned[i].pci_phys_hi) != PCI_CONF_ROM)) in pcicfg_free_device_resources()
3216 if (reg_offset == PCI_CONF_ROM) { in pcicfg_update_reg_prop()
3342 if (reg_offset == PCI_CONF_ROM) { in pcicfg_update_assigned_prop_value()
4249 pci_config_put32(config_handle, PCI_CONF_ROM, 0xfffffffe); in pcicfg_populate_reg_props()
4251 request = pci_config_get32(config_handle, PCI_CONF_ROM); in pcicfg_populate_reg_props()
4259 PCI_CONF_ROM, request, in pcicfg_populate_reg_props()
4265 request, PCI_CONF_ROM) != PCICFG_SUCCESS) { in pcicfg_populate_reg_props()
4493 pci_config_put32(h, PCI_CONF_ROM, 0xfffffffe); in pcicfg_fcode_probe()
4495 request = pci_config_get32(h, PCI_CONF_ROM); in pcicfg_fcode_probe()
[all …]
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| /titanic_50/usr/src/uts/sun4u/io/pci/ |
| H A D | pci_tools.c | 96 PCI_CONF_ROM
768 (bar_offset != PCI_CONF_ROM)) { in pcitool_get_bar()
781 } else if ((PCI_BASE_TYPE_ALL & *bar) && (bar_offset != PCI_CONF_ROM)) { in pcitool_get_bar()
932 if (PCI_BAR_OFFSET(prg) == PCI_CONF_ROM) { in pcitool_dev_reg_ops()
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| H A D | db21554.c | 1646 hdr_off + PCI_CONF_ROM); in db_pci_get_header()
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| /titanic_50/usr/src/uts/i86pc/io/pci/ |
| H A D | pci_tools.c | 74 PCI_CONF_ROM
1069 (prg2.offset != PCI_CONF_ROM)) { in pcitool_dev_reg_ops()
1094 (prg2.offset != PCI_CONF_ROM)) { in pcitool_dev_reg_ops()
1137 if (prg2.offset == PCI_CONF_ROM) { in pcitool_dev_reg_ops()
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| /titanic_50/usr/src/uts/intel/io/hotplug/pcicfg/ |
| H A D | pcicfg.c | 447 pci_config_get32(config_handle, PCI_CONF_ROM)); in pcicfg_dump_device_config()
3041 if (reg_offset == PCI_CONF_ROM) { in pcicfg_update_reg_prop()
3122 if (reg_offset == PCI_CONF_ROM) { in pcicfg_update_assigned_prop_value()
3901 pci_config_put32(config_handle, PCI_CONF_ROM, 0xfffffffe); in pcicfg_populate_reg_props()
3903 request = pci_config_get32(config_handle, PCI_CONF_ROM); in pcicfg_populate_reg_props()
3911 PCI_CONF_ROM, request, in pcicfg_populate_reg_props()
3916 if (pcicfg_update_reg_prop(new_child, request, PCI_CONF_ROM) in pcicfg_populate_reg_props()
4001 base = pci_config_get32(config_handle, PCI_CONF_ROM); in pcicfg_populate_props_from_bar()
4002 pci_config_put32(config_handle, PCI_CONF_ROM, 0xfffffffe); in pcicfg_populate_props_from_bar()
4003 request = pci_config_get32(config_handle, PCI_CONF_ROM); in pcicfg_populate_props_from_bar()
[all …]
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| /titanic_50/usr/src/uts/sun4u/sys/pci/ |
| H A D | db21554_config.h | 55 #define DB_PCONF_EXP_ROM PCI_CONF_ROM
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| /titanic_50/usr/src/uts/common/io/igb/ |
| H A D | igb_debug.c | 129 pci_config_get32(handle, PCI_CONF_ROM)); in pci_dump()
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| /titanic_50/usr/src/uts/common/io/cardbus/ |
| H A D | cardbus_cfg.c | 3017 pci_config_put32(config_handle, PCI_CONF_ROM, 0xffffffff); in cardbus_probe_children()
3019 request = pci_config_get32(config_handle, PCI_CONF_ROM); in cardbus_probe_children()
3029 PCI_CONF_ROM, request, in cardbus_probe_children()
3036 PCI_CONF_ROM) != PCICFG_SUCCESS) { in cardbus_probe_children()
3541 if (reg_offset == PCI_CONF_ROM) {
4374 pci_config_get32(config_handle, PCI_CONF_ROM));
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| /titanic_50/usr/src/uts/common/sys/ |
| H A D | pci.h | 62 #define PCI_CONF_ROM 0x30 /* ROM base register, 4 bytes */ macro
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| /titanic_50/usr/src/uts/common/io/e1000g/ |
| H A D | e1000g_debug.c | 436 pci_config_get32(handle, PCI_CONF_ROM)); in pciconfig_dump()
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| /titanic_50/usr/src/uts/common/io/ixgbe/ |
| H A D | ixgbe_debug.c | 254 pci_config_get32(handle, PCI_CONF_ROM)); in ixgbe_pci_dump()
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| /titanic_50/usr/src/uts/sun4/io/efcode/ |
| H A D | fcpci.c | 1390 if (PCI_REG_REG_G(phys_spec.pci_phys_hi) == PCI_CONF_ROM) { in pci_alloc_resource()
1618 if (PCI_REG_REG_G(phys_spec.pci_phys_hi) == PCI_CONF_ROM) { in pci_free_resource()
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| /titanic_50/usr/src/cmd/pcitool/ |
| H A D | pcitool.c | 281 { PCI_CONF_ROM, 4, "ROM", "Expansion ROM Base Address Register (@30)" },
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| /titanic_50/usr/src/uts/common/io/fibre-channel/fca/qlc/ |
| H A D | ql_init.c | 345 w16 = (uint16_t)ql_pci_config_get16(ha, PCI_CONF_ROM); in ql_pci_sbus_config()
347 ql_pci_config_put16(ha, PCI_CONF_ROM, w16); in ql_pci_sbus_config()
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| /titanic_50/usr/src/uts/common/io/scsi/adapters/pmcs/ |
| H A D | pmcs_fwlog.c | 765 pci_config_get32(pwp->pci_acc_handle, PCI_CONF_ROM)); in pmcs_dump_pcie_conf()
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| /titanic_50/usr/src/uts/common/io/fibre-channel/fca/qlge/ |
| H A D | qlge_dbg.c | 685 pci_config_get32(qlge->pci_handle, PCI_CONF_ROM); in ql_dump_pci_config()
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| /titanic_50/usr/src/uts/intel/io/pci/ |
| H A D | pci_boot.c | 2656 offset = PCI_CONF_ROM; in add_reg_props()
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