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Searched refs:PCI_COMM_SERR_ENABLE (Results 1 – 24 of 24) sorted by relevance

/titanic_50/usr/src/uts/intel/io/pciex/
H A Dpcieb_x86.c273 {0x4, 16, 0xFFFF, 0x0, PCI_COMM_SERR_ENABLE},
304 {0x4, 16, 0xFFFF, PCI_COMM_SERR_ENABLE, PCI_COMM_SERR_ENABLE},
338 {0x4, 16, 0xFFFF, PCI_COMM_SERR_ENABLE, PCI_COMM_SERR_ENABLE},
376 {0x4, 16, 0xFFFF, PCI_COMM_SERR_ENABLE, PCI_COMM_SERR_ENABLE},
397 {0x4, 16, 0xFFFF, PCI_COMM_SERR_ENABLE, PCI_COMM_SERR_ENABLE},
631 regw | PCI_COMM_SERR_ENABLE); in pcieb_intel_sw_workaround()
/titanic_50/usr/src/uts/sun4u/io/pci/
H A Dpci_space.c91 ushort_t pci_command_default = PCI_COMM_SERR_ENABLE |
H A Dsimba.c106 static ushort_t simba_command_default = PCI_COMM_SERR_ENABLE |
805 if (simba_command_default & PCI_COMM_SERR_ENABLE) in simba_initchild()
H A Dpci_util.c574 if (pci_command_default & PCI_COMM_SERR_ENABLE) in init_child()
H A Dpci_pci.c83 static ushort_t ppb_command_default = PCI_COMM_SERR_ENABLE |
915 if (ppb_command_default & PCI_COMM_SERR_ENABLE) in ppb_initchild()
H A Ddb21554.c246 PCI_COMM_SERR_ENABLE |
2336 if (db_command_default & PCI_COMM_SERR_ENABLE) in db_initchild()
H A Dpcipsy.c1016 s |= pci_serr_enable & mask ? PCI_COMM_SERR_ENABLE : 0; in pbm_configure()
H A Dpcisch.c928 s |= pci_serr_enable & mask ? PCI_COMM_SERR_ENABLE : 0; in pbm_configure()
/titanic_50/usr/src/uts/sun4u/opl/io/pcicmu/
H A Dpcmu_util.c407 if (pcmu_command_default & PCI_COMM_SERR_ENABLE) in pcmu_init_child()
H A Dpcicmu.c76 ushort_t pcmu_command_default = PCI_COMM_SERR_ENABLE |
/titanic_50/usr/src/uts/common/sys/
H A Dpci.h156 #define PCI_COMM_SERR_ENABLE 0x100 macro
/titanic_50/usr/src/uts/common/io/cardbus/
H A Dcardbus_cfg.c4009 PCI_COMM_PARITY_DETECT | PCI_COMM_SERR_ENABLE);
4035 comm |= (PCI_COMM_ME | PCI_COMM_PARITY_DETECT | PCI_COMM_SERR_ENABLE);
4115 if (comm & PCI_COMM_SERR_ENABLE)
4207 PCI_COMM_PARITY_DETECT | PCI_COMM_SERR_ENABLE);
H A Dcardbus.c73 static int cardbus_command_default = PCI_COMM_SERR_ENABLE |
1155 if (cardbus_command_default & PCI_COMM_SERR_ENABLE) in cardbus_init_child_regs()
/titanic_50/usr/src/uts/sun4/io/
H A Debus.c898 comm |= (PCI_COMM_ME|PCI_COMM_MAE|PCI_COMM_SERR_ENABLE| in ebus_config()
H A Dpcicfg.c3952 val &= ~PCI_COMM_SERR_ENABLE; in pcicfg_disable_bridge_probe_err()
/titanic_50/usr/src/uts/common/io/pciex/
H A Dpcie.c64 PCI_COMM_SERR_ENABLE |
552 tmp16 &= ~PCI_COMM_SERR_ENABLE; in pcie_initchild()
/titanic_50/usr/src/uts/sun4u/montecarlo/io/
H A Dacebus.c799 comm |= (PCI_COMM_ME|PCI_COMM_MAE|PCI_COMM_SERR_ENABLE| in acebus_config()
/titanic_50/usr/src/uts/sun4u/io/
H A Dsbbc.c1006 comm = (PCI_COMM_ME | PCI_COMM_MAE | PCI_COMM_SERR_ENABLE | in sbbc_config4pci()
/titanic_50/usr/src/uts/common/io/ntxn/
H A Dunm_gem.c369 pci_cmd_word |= (PCI_COMM_INTX_DISABLE | PCI_COMM_SERR_ENABLE); in unm_pci_cfg_init()
/titanic_50/usr/src/uts/intel/io/intel_nb5000/
H A Dnb5000_init.c943 regw | PCI_COMM_SERR_ENABLE); in nb_pex_init()
/titanic_50/usr/src/uts/common/io/hme/
H A Dhme.c1091 PCI_COMM_SERR_ENABLE | PCI_COMM_PARITY_DETECT | in hmeget_promprops()
/titanic_50/usr/src/uts/common/io/fibre-channel/fca/qlc/
H A Dql_init.c277 PCI_COMM_PARITY_DETECT | PCI_COMM_SERR_ENABLE); in ql_pci_sbus_config()
/titanic_50/usr/src/uts/common/io/fibre-channel/fca/qlge/
H A Dqlge.c235 PCI_COMM_PARITY_DETECT | PCI_COMM_SERR_ENABLE); in ql_pci_config()
/titanic_50/usr/src/uts/common/io/scsi/adapters/mpt_sas/
H A Dmptsas.c2563 cmdreg |= (PCI_COMM_ME | PCI_COMM_SERR_ENABLE | in mptsas_setup_cmd_reg()