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Searched refs:PCI_CBUS_IO_LIMIT1 (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/common/sys/
H A Dpci.h135 #define PCI_CBUS_IO_LIMIT1 0x38 /* IO limit reg 1, 4 bytes */ macro
/titanic_50/usr/src/uts/common/io/cardbus/
H A Dcardbus_cfg.c1526 pci_config_put32(handle, PCI_CBUS_IO_LIMIT1, 0); in cardbus_setup_bridge()
4459 pci_config_get32(config_handle, PCI_CBUS_IO_LIMIT1));