Searched refs:PCI_BASE_ROM_ADDR_M (Results 1 – 5 of 5) sorted by relevance
586 #define PCI_BASE_ROM_ADDR_M 0xfffff800 /* ROM address mask */ macro
3217 size = (~(PCI_BASE_ROM_ADDR_M & regvalue))+1; in pcicfg_update_reg_prop()3345 base = PCI_BASE_ROM_ADDR_M & base; in pcicfg_update_assigned_prop_value()4260 (~(PCI_BASE_ROM_ADDR_M & request))+1); in pcicfg_populate_reg_props()4524 (~(PCI_BASE_ROM_ADDR_M & request)) + 1); in pcicfg_fcode_probe()4867 (~(PCI_BASE_ROM_ADDR_M & request))+1); in pcicfg_populate_props_from_bar()4878 size = (~(PCI_BASE_ROM_ADDR_M & request))+1; in pcicfg_populate_props_from_bar()6091 size = (~(PCI_BASE_ROM_ADDR_M & fc_request)) + 1; in pcicfg_fcode_assign_bars()
3042 size = (~(PCI_BASE_ROM_ADDR_M & regvalue))+1; in pcicfg_update_reg_prop()3125 base = PCI_BASE_ROM_ADDR_M & base; in pcicfg_update_assigned_prop_value()3912 (~(PCI_BASE_ROM_ADDR_M & request)) + 1); in pcicfg_populate_reg_props()4013 (~(PCI_BASE_ROM_ADDR_M & request)) + 1); in pcicfg_populate_props_from_bar()4024 size = (~(PCI_BASE_ROM_ADDR_M & request))+1; in pcicfg_populate_props_from_bar()
2671 pci_putl(bus, dev, func, offset, PCI_BASE_ROM_ADDR_M); in add_reg_props()2675 value &= PCI_BASE_ROM_ADDR_M; in add_reg_props()2683 base &= PCI_BASE_ROM_ADDR_M; in add_reg_props()
3030 (~(PCI_BASE_ROM_ADDR_M & request))+1); in cardbus_probe_children()3542 size = (~(PCI_BASE_ROM_ADDR_M & regvalue))+1;