xref: /titanic_50/usr/src/uts/common/xen/public/arch-x86/xen-x86_64.h (revision 349b53dd4e695e3d833b5380540385145b2d3ae8)
1 /******************************************************************************
2  * xen-x86_64.h
3  *
4  * Guest OS interface to x86 64-bit Xen.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to
8  * deal in the Software without restriction, including without limitation the
9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10  * sell copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Copyright (c) 2004-2006, K A Fraser
25  */
26 
27 #ifndef __XEN_PUBLIC_ARCH_X86_XEN_X86_64_H__
28 #define __XEN_PUBLIC_ARCH_X86_XEN_X86_64_H__
29 
30 /*
31  * Hypercall interface:
32  *  Input:  %rdi, %rsi, %rdx, %r10, %r8 (arguments 1-5)
33  *  Output: %rax
34  * Access is via hypercall page (set up by guest loader or via a Xen MSR):
35  *  call hypercall_page + hypercall-number * 32
36  * Clobbered: argument registers (e.g., 2-arg hypercall clobbers %rdi,%rsi)
37  */
38 
39 /*
40  * Direct hypercall interface:
41  * As above, except the entry sequence to the hypervisor is:
42  *  mov $hypercall-number*32,%eax ; syscall
43  * Clobbered: %rcx, %r11, argument registers (as above)
44  */
45 #if !defined(_ASM)
46 #define TRAP_INSTR "syscall"
47 #else
48 #define TRAP_INSTR syscall
49 #endif
50 
51 /*
52  * 64-bit segment selectors
53  * These flat segments are in the Xen-private section of every GDT. Since these
54  * are also present in the initial GDT, many OSes will be able to avoid
55  * installing their own GDT.
56  */
57 
58 #define FLAT_RING3_CS32 0xe023  /* GDT index 260 */
59 #define FLAT_RING3_CS64 0xe033  /* GDT index 261 */
60 #define FLAT_RING3_DS32 0xe02b  /* GDT index 262 */
61 #define FLAT_RING3_DS64 0x0000  /* NULL selector */
62 #define FLAT_RING3_SS32 0xe02b  /* GDT index 262 */
63 #define FLAT_RING3_SS64 0xe02b  /* GDT index 262 */
64 
65 #define FLAT_KERNEL_DS64 FLAT_RING3_DS64
66 #define FLAT_KERNEL_DS32 FLAT_RING3_DS32
67 #define FLAT_KERNEL_DS   FLAT_KERNEL_DS64
68 #define FLAT_KERNEL_CS64 FLAT_RING3_CS64
69 #define FLAT_KERNEL_CS32 FLAT_RING3_CS32
70 #define FLAT_KERNEL_CS   FLAT_KERNEL_CS64
71 #define FLAT_KERNEL_SS64 FLAT_RING3_SS64
72 #define FLAT_KERNEL_SS32 FLAT_RING3_SS32
73 #define FLAT_KERNEL_SS   FLAT_KERNEL_SS64
74 
75 #define FLAT_USER_DS64 FLAT_RING3_DS64
76 #define FLAT_USER_DS32 FLAT_RING3_DS32
77 #define FLAT_USER_DS   FLAT_USER_DS64
78 #define FLAT_USER_CS64 FLAT_RING3_CS64
79 #define FLAT_USER_CS32 FLAT_RING3_CS32
80 #define FLAT_USER_CS   FLAT_USER_CS64
81 #define FLAT_USER_SS64 FLAT_RING3_SS64
82 #define FLAT_USER_SS32 FLAT_RING3_SS32
83 #define FLAT_USER_SS   FLAT_USER_SS64
84 
85 #define __HYPERVISOR_VIRT_START 0xFFFF800000000000
86 #define __HYPERVISOR_VIRT_END   0xFFFF880000000000
87 #define __MACH2PHYS_VIRT_START  0xFFFF800000000000
88 #define __MACH2PHYS_VIRT_END    0xFFFF804000000000
89 
90 #ifndef HYPERVISOR_VIRT_START
91 #define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START)
92 #define HYPERVISOR_VIRT_END   mk_unsigned_long(__HYPERVISOR_VIRT_END)
93 #endif
94 
95 #define MACH2PHYS_VIRT_START  mk_unsigned_long(__MACH2PHYS_VIRT_START)
96 #define MACH2PHYS_VIRT_END    mk_unsigned_long(__MACH2PHYS_VIRT_END)
97 #define MACH2PHYS_NR_ENTRIES  ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>3)
98 #ifndef machine_to_phys_mapping
99 #define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START)
100 #endif
101 
102 /*
103  * int HYPERVISOR_set_segment_base(unsigned int which, unsigned long base)
104  *  @which == SEGBASE_*  ;  @base == 64-bit base address
105  * Returns 0 on success.
106  */
107 #define SEGBASE_FS          0
108 #define SEGBASE_GS_USER     1
109 #define SEGBASE_GS_KERNEL   2
110 #define SEGBASE_GS_USER_SEL 3 /* Set user %gs specified in base[15:0] */
111 
112 /*
113  * int HYPERVISOR_iret(void)
114  * All arguments are on the kernel stack, in the following format.
115  * Never returns if successful. Current kernel context is lost.
116  * The saved CS is mapped as follows:
117  *   RING0 -> RING3 kernel mode.
118  *   RING1 -> RING3 kernel mode.
119  *   RING2 -> RING3 kernel mode.
120  *   RING3 -> RING3 user mode.
121  * However RING0 indicates that the guest kernel should return to iteself
122  * directly with
123  *      orb   $3,1*8(%rsp)
124  *      iretq
125  * If flags contains VGCF_in_syscall:
126  *   Restore RAX, RIP, RFLAGS, RSP.
127  *   Discard R11, RCX, CS, SS.
128  * Otherwise:
129  *   Restore RAX, R11, RCX, CS:RIP, RFLAGS, SS:RSP.
130  * All other registers are saved on hypercall entry and restored to user.
131  */
132 /* Guest exited in SYSCALL context? Return to guest with SYSRET? */
133 #define _VGCF_in_syscall 8
134 #define VGCF_in_syscall  (1<<_VGCF_in_syscall)
135 #define VGCF_IN_SYSCALL  VGCF_in_syscall
136 
137 #ifndef __ASSEMBLY__
138 
139 struct iret_context {
140     /* Top of stack (%rsp at point of hypercall). */
141     uint64_t rax, r11, rcx, flags, rip, cs, rflags, rsp, ss;
142     /* Bottom of iret stack frame. */
143 };
144 
145 #if defined(__GNUC__) && !defined(__STRICT_ANSI__)
146 /* Anonymous union includes both 32- and 64-bit names (e.g., eax/rax). */
147 #define __DECL_REG(name) union { \
148     uint64_t r ## name, e ## name; \
149     uint32_t _e ## name; \
150 }
151 #else
152 /* Non-gcc sources must always use the proper 64-bit name (e.g., rax). */
153 #define __DECL_REG(name) uint64_t r ## name
154 #endif
155 
156 struct cpu_user_regs {
157     uint64_t r15;
158     uint64_t r14;
159     uint64_t r13;
160     uint64_t r12;
161     __DECL_REG(bp);
162     __DECL_REG(bx);
163     uint64_t r11;
164     uint64_t r10;
165     uint64_t r9;
166     uint64_t r8;
167     __DECL_REG(ax);
168     __DECL_REG(cx);
169     __DECL_REG(dx);
170     __DECL_REG(si);
171     __DECL_REG(di);
172     uint32_t error_code;    /* private */
173     uint32_t entry_vector;  /* private */
174     __DECL_REG(ip);
175     uint16_t cs, _pad0[1];
176     uint8_t  saved_upcall_mask;
177     uint8_t  _pad1[3];
178     __DECL_REG(flags);      /* rflags.IF == !saved_upcall_mask */
179     __DECL_REG(sp);
180     uint16_t ss, _pad2[3];
181     uint16_t es, _pad3[3];
182     uint16_t ds, _pad4[3];
183     uint16_t fs, _pad5[3]; /* Non-zero => takes precedence over fs_base.     */
184     uint16_t gs, _pad6[3]; /* Non-zero => takes precedence over gs_base_usr. */
185 };
186 typedef struct cpu_user_regs cpu_user_regs_t;
187 DEFINE_XEN_GUEST_HANDLE(cpu_user_regs_t);
188 
189 #undef __DECL_REG
190 
191 #define xen_pfn_to_cr3(pfn) ((unsigned long)(pfn) << 12)
192 #define xen_cr3_to_pfn(cr3) ((unsigned long)(cr3) >> 12)
193 
194 struct arch_vcpu_info {
195     unsigned long cr2;
196     unsigned long pad; /* sizeof(vcpu_info_t) == 64 */
197 };
198 typedef struct arch_vcpu_info arch_vcpu_info_t;
199 
200 typedef unsigned long xen_callback_t;
201 
202 /*
203  * Structure used to capture the register state at panic time.  This struct
204  * is built to mimic a similar structure in Solaris.  If there is interest
205  * in making this panic implementation an official part of Xen, this should
206  * be made more platform-neutral.
207  */
208 struct panic_regs {
209 	unsigned long pad1;
210 	unsigned long pad2;
211 	unsigned long rdi;
212 	unsigned long rsi;
213 	unsigned long rdx;
214 	unsigned long rcx;
215 	unsigned long r8;
216 	unsigned long r9;
217 	unsigned long rax;
218 	unsigned long rbx;
219 	unsigned long rbp;
220 	unsigned long r10;
221 	unsigned long r11;
222 	unsigned long r12;
223 	unsigned long r13;
224 	unsigned long r14;
225 	unsigned long r15;
226 	unsigned long pad3;
227 	unsigned long pad4;
228 	unsigned long ds;
229 	unsigned long es;
230 	unsigned long fs;
231 	unsigned long gs;
232 	unsigned long pad5;
233 	unsigned long pad6;
234 	unsigned long rip;
235 	unsigned long cs;
236 	unsigned long rfl;
237 	unsigned long rsp;
238 	unsigned long ss;
239 };
240 
241 #endif /* !__ASSEMBLY__ */
242 
243 /* Offsets of each field in the xen_panic_regs structure.  */
244 #define PANIC_REG_PAD1		0
245 #define PANIC_REG_PAD2		8
246 #define PANIC_REG_RDI		16
247 #define PANIC_REG_RSI		24
248 #define PANIC_REG_RDX		32
249 #define PANIC_REG_RCX		40
250 #define PANIC_REG_R8		48
251 #define PANIC_REG_R9		56
252 #define PANIC_REG_RAX		64
253 #define PANIC_REG_RBX		72
254 #define PANIC_REG_RBP		80
255 #define PANIC_REG_R10		88
256 #define PANIC_REG_R11		96
257 #define PANIC_REG_R12		104
258 #define PANIC_REG_R13		112
259 #define PANIC_REG_R14		120
260 #define PANIC_REG_R15		128
261 #define PANIC_REG_PAD3		136
262 #define PANIC_REG_PAD4		144
263 #define PANIC_REG_DS		152
264 #define PANIC_REG_ES		160
265 #define PANIC_REG_FS		168
266 #define PANIC_REG_GS		176
267 #define PANIC_REG_PAD5		184
268 #define PANIC_REG_PAD6		192
269 #define PANIC_REG_RIP		200
270 #define PANIC_REG_CS		208
271 #define PANIC_REG_RFL		216
272 #define PANIC_REG_RSP		224
273 #define PANIC_REG_SS		232
274 #define PANIC_REG_STRUCT_SIZE	240
275 
276 #endif /* __XEN_PUBLIC_ARCH_X86_XEN_X86_64_H__ */
277 
278 /*
279  * Local variables:
280  * mode: C
281  * c-set-style: "BSD"
282  * c-basic-offset: 4
283  * tab-width: 4
284  * indent-tabs-mode: nil
285  * End:
286  */
287