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Searched refs:NXGE_OK (Results 1 – 18 of 18) sorted by relevance

/titanic_50/usr/src/uts/common/io/nxge/
H A Dnxge_mac.c280 nxge_status_t status = NXGE_OK; in nxge_get_xcvr_type()
387 != NXGE_OK) { in nxge_get_xcvr_type()
398 if ((status = nxge_set_tn1010_param(nxgep)) != NXGE_OK) in nxge_get_xcvr_type()
411 return (NXGE_OK); in nxge_get_xcvr_type()
430 != NXGE_OK) { in nxge_get_xcvr_type()
438 != NXGE_OK) { in nxge_get_xcvr_type()
463 if (status != NXGE_OK) in nxge_get_xcvr_type()
482 status = NXGE_OK; in nxge_get_xcvr_type()
501 return (NXGE_OK); in nxge_get_xcvr_type()
527 if (status != NXGE_OK) { in nxge_get_xcvr_type()
[all …]
H A Dnxge_classify.c170 nxge_status_t status = NXGE_OK; in nxge_classify_init()
173 if (status != NXGE_OK) in nxge_classify_init()
176 if (status != NXGE_OK) in nxge_classify_init()
180 if (status != NXGE_OK) in nxge_classify_init()
183 return (NXGE_OK); in nxge_classify_init()
189 nxge_status_t status = NXGE_OK; in nxge_classify_uninit()
192 if (status != NXGE_OK) { in nxge_classify_uninit()
195 return (NXGE_OK); in nxge_classify_uninit()
238 return (NXGE_OK); in nxge_set_hw_classify_config()
H A Dnxge_fzc.c63 return (NXGE_OK); in nxge_test_and_set()
92 return (NXGE_OK); in nxge_set_fzc_multi_part_ctl()
111 return (NXGE_OK); in nxge_get_fzc_multi_part_ctl()
121 nxge_status_t status = NXGE_OK; in nxge_fzc_intr_init()
126 if ((status = nxge_fzc_intr_tmres_set(nxgep)) != NXGE_OK) { in nxge_fzc_intr_init()
135 if ((status = nxge_fzc_intr_ldg_num_set(nxgep)) != NXGE_OK) in nxge_fzc_intr_init()
139 if ((status = nxge_fzc_intr_sid_set(nxgep)) != NXGE_OK) in nxge_fzc_intr_init()
198 return (NXGE_OK); in nxge_fzc_intr_ldg_num_set()
217 return (NXGE_OK); in nxge_fzc_intr_tmres_set()
259 return (NXGE_OK); in nxge_fzc_intr_sid_set()
[all …]
H A Dnxge_fflp.c117 return (NXGE_OK); in nxge_tcam_dump_entry()
179 return (NXGE_OK); in nxge_fflp_vlan_tbl_clear_all()
239 return (NXGE_OK); in nxge_fflp_tcam_init()
285 return (NXGE_OK); in nxge_fflp_tcam_invalidate_all()
352 return (NXGE_OK); in nxge_fflp_fcram_invalidate_all()
411 return (NXGE_OK); in nxge_fflp_fcram_init()
443 return (NXGE_OK); in nxge_logical_mac_assign_rdc_table()
489 return (NXGE_OK); in nxge_main_mac_assign_rdc_table()
529 return (NXGE_OK); in nxge_alt_mcast_mac_assign_rdc_table()
535 nxge_status_t status = NXGE_OK; in nxge_fflp_init_hostinfo()
[all …]
H A Dnxge_ipp.c116 return (NXGE_OK); in nxge_ipp_init()
173 return (NXGE_OK); in nxge_ipp_disable()
240 return (NXGE_OK); in nxge_ipp_reset()
277 return (NXGE_OK); in nxge_ipp_enable()
322 return (NXGE_OK); in nxge_ipp_drain()
340 nxge_status_t status = NXGE_OK; in nxge_ipp_handle_sys_errors()
357 return (NXGE_OK); in nxge_ipp_handle_sys_errors()
393 &ue_ecc_valid)) != NXGE_OK) in nxge_ipp_handle_sys_errors()
497 if (status == NXGE_OK) { in nxge_ipp_handle_sys_errors()
600 nxge_status_t status = NXGE_OK; in nxge_ipp_fatal_err_recover()
[all …]
H A Dnxge_zcp.c104 return (NXGE_OK); in nxge_zcp_init()
121 nxge_status_t status = NXGE_OK; in nxge_zcp_handle_sys_errors()
226 &ue_ecc_valid)) != NXGE_OK) in nxge_zcp_handle_sys_errors()
266 if (status == NXGE_OK) { in nxge_zcp_handle_sys_errors()
393 nxge_status_t status = NXGE_OK; in nxge_zcp_fatal_err_recover()
408 if (nxge_rx_mac_disable(nxgep) != NXGE_OK) in nxge_zcp_fatal_err_recover()
466 if (nxge_rx_mac_reset(nxgep) != NXGE_OK) in nxge_zcp_fatal_err_recover()
470 if ((status = nxge_rx_mac_init(nxgep)) != NXGE_OK) in nxge_zcp_fatal_err_recover()
474 if (nxge_rx_mac_enable(nxgep) != NXGE_OK) in nxge_zcp_fatal_err_recover()
480 return (NXGE_OK); in nxge_zcp_fatal_err_recover()
H A Dnxge_txdma.c123 return (NXGE_OK); in nxge_init_txdma_channels()
157 if (status != NXGE_OK) { in nxge_init_txdma_channel()
165 if (status != NXGE_OK) { in nxge_init_txdma_channel()
212 if (nxge_txdma_stop_channel(nxgep, channel) != NXGE_OK) in nxge_uninit_txdma_channel()
266 nxge_status_t status = NXGE_OK; in nxge_reset_txdma_channel()
321 nxge_status_t status = NXGE_OK; in nxge_init_txdma_channel_event_mask()
361 nxge_status_t status = NXGE_OK; in nxge_init_txdma_channel_cntl_stat()
410 nxge_status_t status = NXGE_OK; in nxge_enable_txdma_channel()
428 if (nxge_hio_intr_add(nxgep, VP_BOUND_TX, channel) != NXGE_OK) in nxge_enable_txdma_channel()
1139 nxge_status_t status = NXGE_OK; in nxge_tx_intr()
[all …]
H A Dnxge_rxdma.c148 if (nxge_rxdma_hw_start_common(nxgep) != NXGE_OK) { in nxge_init_rxdma_channels()
179 return (NXGE_OK); in nxge_init_rxdma_channels()
211 if (status != NXGE_OK) { in nxge_init_rxdma_channel()
223 if (status != NXGE_OK) { in nxge_init_rxdma_channel()
231 if (status != NXGE_OK) { in nxge_init_rxdma_channel()
288 nxge_status_t status = NXGE_OK; in nxge_reset_rxdma_channel()
348 nxge_status_t status = NXGE_OK; in nxge_dump_rxdma_channel()
368 nxge_status_t status = NXGE_OK; in nxge_init_rxdma_channel_event_mask()
388 nxge_status_t status = NXGE_OK; in nxge_init_rxdma_channel_cntl_stat()
460 return (NXGE_OK); in nxge_rxdma_cfg_rdcgrp_default_rdc()
[all …]
H A Dnxge_hio_guest.c122 return (NXGE_OK); in nxge_guest_regs_map()
272 if (nxge_hio_intr_init(nxge) != NXGE_OK) { in nxge_hio_vr_add()
348 if (status != NXGE_OK) { in nxge_hio_vr_add()
541 return (NXGE_OK); in nxge_hio_vr_release()
581 return (NXGE_OK); in nxge_hio_vr_release()
618 return (NXGE_OK); in nxge_tdc_lp_conf()
701 return (NXGE_OK); in nxge_tdc_lp_conf()
736 return (NXGE_OK); in nxge_rdc_lp_conf()
819 return (NXGE_OK); in nxge_rdc_lp_conf()
972 return (NXGE_OK); in nxge_hio_rdc_intr_arm()
[all …]
H A Dnxge_hw.c63 nxge_status_t status = NXGE_OK; in nxge_global_reset()
67 if ((status = nxge_link_monitor(nxgep, LINK_MONITOR_STOP)) != NXGE_OK) in nxge_global_reset()
80 if ((status = nxge_link_init(nxgep)) != NXGE_OK) in nxge_global_reset()
84 if ((status = nxge_link_monitor(nxgep, LINK_MONITOR_START)) != NXGE_OK) in nxge_global_reset()
86 if ((status = nxge_mac_init(nxgep)) != NXGE_OK) in nxge_global_reset()
325 nxge_status_t status = NXGE_OK; in nxge_check_xaui_xfp()
343 BCM8704_USER_ANALOG_STATUS0_REG, &val)) == NXGE_OK) { in nxge_check_xaui_xfp()
349 if (status != NXGE_OK) { in nxge_check_xaui_xfp()
497 if (nxge_check_xaui_xfp(nxgep) != NXGE_OK) { in nxge_syserr_intr()
1031 if (nxge_set_lb_normal(nxgep) != NXGE_OK) { in nxge_set_lb()
[all …]
H A Dnxge_txc.c73 return (NXGE_OK); in nxge_txc_init()
113 return (NXGE_OK); in nxge_txc_uninit()
216 return (NXGE_OK); in nxge_txc_tdc_bind()
289 return (NXGE_OK); in nxge_txc_tdc_unbind()
342 nxge_status_t status = NXGE_OK; in nxge_txc_handle_sys_errors()
397 nxge_status_t status = NXGE_OK; in nxge_txc_handle_port_errors()
513 if (status == NXGE_OK) { in nxge_txc_handle_port_errors()
H A Dnxge_espc.c59 nxge_status_t status = NXGE_OK; in nxge_espc_mac_addrs_get()
92 nxge_status_t status = NXGE_OK; in nxge_espc_num_macs_get()
111 nxge_status_t status = NXGE_OK; in nxge_espc_num_ports_get()
134 nxge_status_t status = NXGE_OK; in nxge_espc_phy_type_get()
189 nxge_status_t status = NXGE_OK; in nxge_espc_max_frame_sz_get()
H A Dnxge_main.c619 if (status != NXGE_OK) { in nxge_attach()
629 if (status != NXGE_OK) { in nxge_attach()
648 if ((status = nxge_hio_init(nxgep)) != NXGE_OK) { in nxge_attach()
792 if (status != NXGE_OK) { in nxge_attach()
801 if (status != NXGE_OK) { in nxge_attach()
817 if (status != NXGE_OK) { in nxge_attach()
827 if (status != NXGE_OK) { in nxge_attach()
860 if ((status = nxge_mac_register(nxgep)) != NXGE_OK) { in nxge_attach()
909 if (status != NXGE_OK) in nxge_attach()
1195 nxge_status_t status = NXGE_OK; in nxge_map_regs()
[all …]
H A Dnxge_hio.c171 return (NXGE_OK); in nxge_hio_init()
431 nxge_status_t status = NXGE_OK; in nxge_grp_dc_add()
519 if ((status = (*dc->init)(nxge, channel)) != NXGE_OK) { in nxge_grp_dc_add()
1042 return (NXGE_OK); in nxge_hio_init()
1077 return (NXGE_OK); in nxge_hio_init()
2142 if (nxge_intr_remove(nxge, VP_BOUND_TX, channel) != NXGE_OK) { in nxge_hio_tdc_share()
2163 if (nxge_init_fzc_tdc(nxge, channel) != NXGE_OK) { in nxge_hio_tdc_share()
2217 if (nxge_intr_remove(nxge, VP_BOUND_RX, channel) != NXGE_OK) { in nxge_hio_rdc_share()
2225 if (nxge_rx_mac_disable(nxge) != NXGE_OK) { in nxge_hio_rdc_share()
2235 if (nxge_disable_rxdma_channel(nxge, channel) != NXGE_OK) { in nxge_hio_rdc_share()
[all …]
H A Dnxge_virtual.c183 nxge_status_t status = NXGE_OK; in nxge_cntlops()
312 return (NXGE_OK); in nxge_cntlops()
325 return (NXGE_OK); in nxge_cntlops()
400 nxge_status_t status = NXGE_OK; in nxge_update_rxdma_grp_properties()
574 nxge_status_t status = NXGE_OK; in nxge_update_rxdma_properties()
789 nxge_status_t status = NXGE_OK; in nxge_update_txdma_properties()
993 nxge_status_t status = NXGE_OK; in nxge_update_cfg_properties()
1038 nxge_status_t status = NXGE_OK; in nxge_cfg_verify_set_classify_prop()
1158 nxge_status_t status = NXGE_OK; in nxge_cfg_verify_set_classify()
1213 nxge_status_t status = NXGE_OK; in nxge_cfg_verify_set()
[all …]
H A Dnxge_intr.c139 return (NXGE_OK); in nxge_intr_add()
224 return (NXGE_OK); in nxge_intr_remove()
397 return (NXGE_OK); in nxge_hio_intr_add()
451 return (NXGE_OK); in nxge_hio_intr_remove()
499 return (NXGE_OK); in nxge_hio_intr_remove()
665 return (NXGE_OK); in nxge_hio_intr_init()
H A Dnxge_ndd.c1397 if (status != NXGE_OK) in nxge_param_set_mac_rdcgrp()
1517 if (status != NXGE_OK) in nxge_param_set_vlan_rdcgrp()
1677 if (status != NXGE_OK) in nxge_param_tcam_enable()
1709 if (status != NXGE_OK) in nxge_param_hash_lookup_enable()
1741 if (status != NXGE_OK) in nxge_param_llc_snap_enable()
1875 if (status != NXGE_OK) in nxge_param_set_ip_opt()
1901 if (status != NXGE_OK) in nxge_param_get_ip_opt()
1971 if (status != NXGE_OK) in nxge_param_fflp_hash_init()
2032 if (status != NXGE_OK) in nxge_param_set_grp_rdc()
2076 if (status != NXGE_OK) in nxge_param_set_port_rdc()
[all …]
/titanic_50/usr/src/uts/common/sys/nxge/
H A Dnxge.h70 #define NXGE_OK 0 macro