Searched refs:NIG_REG_XGXS_LANE_SEL_P0 (Results 1 – 2 of 2) sorted by relevance
2025 REG_WR(cb, NIG_REG_XGXS_LANE_SEL_P0 + port*4, 1); in elink_emac_enable()2036 REG_WR(cb, NIG_REG_XGXS_LANE_SEL_P0 + port*4, 1); in elink_emac_enable()2048 REG_WR(cb, NIG_REG_XGXS_LANE_SEL_P0 + port*4, ser_lane); in elink_emac_enable()2688 REG_WR(cb, NIG_REG_XGXS_LANE_SEL_P0 + port*4, 0x0); in elink_bmac_enable()
10144 #define NIG_REG_XGXS_LANE_SEL_P0 … macro