| /titanic_50/usr/src/uts/intel/io/acpica/executer/ |
| H A D | exfldio.c | 619 UINT64 Mask, in AcpiExWriteWithUpdateRule() argument
628 ACPI_FUNCTION_TRACE_U32 (ExWriteWithUpdateRule, Mask); in AcpiExWriteWithUpdateRule()
637 if (Mask != ACPI_UINT64_MAX) in AcpiExWriteWithUpdateRule()
648 if ((~Mask << (ACPI_MUL_8 (sizeof (Mask)) - in AcpiExWriteWithUpdateRule()
662 MergedValue |= (CurrentValue & ~Mask); in AcpiExWriteWithUpdateRule()
670 MergedValue |= ~Mask; in AcpiExWriteWithUpdateRule()
677 MergedValue &= Mask; in AcpiExWriteWithUpdateRule()
693 ACPI_FORMAT_UINT64 (Mask), in AcpiExWriteWithUpdateRule()
890 UINT64 Mask; in AcpiExInsertIntoField() local
963 Mask = WidthMask & in AcpiExInsertIntoField()
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| /titanic_50/usr/src/lib/iconv_modules/hi_IN/ |
| H A D | UTF-8%iscii91.c | 40 #define analyze_utf8(Ch, Mask, nBytes) \ argument
43 Mask = 0x7f; \
46 Mask = 0x1f; \
49 Mask = 0x0f; \
52 Mask = 0x07; \
55 Mask = 0x03; \
58 Mask = 0x01; \
62 #define ucs2_from_utf8(mUCS, Ch, Ct, Mask, Len) \ argument
63 (mUCS) = (Ch)[0] & (Mask); \
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| /titanic_50/usr/src/uts/intel/io/acpica/resources/ |
| H A D | rsutils.c | 69 UINT16 Mask, in AcpiRsDecodeBitmask() argument
81 for (i = 0, BitCount = 0; Mask; i++) in AcpiRsDecodeBitmask()
83 if (Mask & 0x0001) in AcpiRsDecodeBitmask()
89 Mask >>= 1; in AcpiRsDecodeBitmask()
115 UINT16 Mask; in AcpiRsEncodeBitmask() local
123 for (i = 0, Mask = 0; i < Count; i++) in AcpiRsEncodeBitmask()
125 Mask |= (0x1 << List[i]); in AcpiRsEncodeBitmask()
128 return (Mask); in AcpiRsEncodeBitmask()
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| /titanic_50/usr/src/uts/intel/sys/acpi/ |
| H A D | acmacros.h | 278 #define ACPI_REGISTER_PREPARE_BITS(Val, Pos, Mask) \ argument
279 ((Val << Pos) & Mask)
281 #define ACPI_REGISTER_INSERT_VALUE(Reg, Pos, Mask, Val) \ argument
282 Reg = (Reg & (~(Mask))) | ACPI_REGISTER_PREPARE_BITS(Val, Pos, Mask)
284 #define ACPI_INSERT_BITS(Target, Mask, Source) \ argument
285 Target = ((Target & (~(Mask))) | (Source & Mask))
289 #define ACPI_GET_BITS(SourcePtr, Position, Mask) \ argument
290 ((*(SourcePtr) >> (Position)) & (Mask))
292 #define ACPI_SET_BITS(TargetPtr, Position, Mask, Value) \ argument
293 (*(TargetPtr) |= (((Value) & (Mask)) << (Position)))
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| H A D | acresrc.h | 320 UINT16 Mask,
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| H A D | actbl2.h | 199 UINT8 Mask; member
1612 UINT32 Mask; /* Bitmask required for this register instruction */ member
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| H A D | acinterp.h | 188 UINT64 Mask,
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| H A D | actbl1.h | 124 UINT64 Mask; /* Bitmask required for this register instruction */ member
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| H A D | acdisasm.h | 844 UINT16 Mask);
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| /titanic_50/usr/src/uts/intel/io/acpica/disassembler/ |
| H A D | dmresrc.c | 193 UINT16 Mask) in AcpiDmBitList() argument
209 if (Mask & 1) in AcpiDmBitList()
220 Mask >>= 1; in AcpiDmBitList()
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| /titanic_50/usr/src/data/perfmon/ |
| H A D | readme.txt | 83 This field maps to the Unit Mask filed in the IA32_PERFEVTSELx[15:8] MSRs. It further qualifies the…
140 This field maps to the Counter Mask (CMASK) field in IA32_PERFEVTSELx[31:24] MSR.
143 This field corresponds to the Invert Counter Mask (INV) field in IA32_PERFEVTSELx[23] MSR.
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| /titanic_50/usr/src/uts/common/io/yge/ |
| H A D | yge.h | 651 #define Y2_IS_PORT_MASK(Port, Mask) ((Mask) << (Port*8)) argument
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| /titanic_50/usr/src/uts/sun4v/cpu/ |
| H A D | common_asm.s | 445 andn %o2, 1, %o2 ! Mask off lowest bit
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| /titanic_50/usr/src/uts/sun4u/cpu/ |
| H A D | common_asm.s | 599 andn %o2, 1, %o2 ! Mask off lowest bit
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| /titanic_50/usr/src/uts/common/smbsrv/ndl/ |
| H A D | samrpc.ndl | 181 * Alias Access Mask values for SAMR
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| /titanic_50/usr/src/data/hwdata/ |
| H A D | usb.ids | 19002 281a RK2818 in Mask ROM mode
19003 290a RK2918 in Mask ROM mode
19004 292a RK2928 in Mask ROM mode
19005 292c RK3026 in Mask ROM mode
19006 300a RK3066 in Mask ROM mode
19007 300b RK3168 in Mask ROM mode
19008 301a RK3036 in Mask ROM mode
19009 310a RK3066B in Mask ROM mode
19010 310b RK3188 in Mask ROM mode
19011 310c RK3126/RK3128 in Mask ROM mode
[all …]
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| /titanic_50/usr/src/grub/grub-0.97/ |
| H A D | ChangeLog | 2863 * stage2/disk_io.c (next_partition): Mask out bsd partition sub
5135 * stage2/boot.c (load_initrd): Mask the address with 0x3FFFFFFF
5231 Mask *DATAPTR with MASK when calling convert_to_ascii.
5317 * stage2/disk_io.c [!STAGE1_5] (print_fsys_type): Mask
5559 value. Mask FIRST_FAT_ENTRY with 0xFFF if FAT_SIZE is equal to
6805 * stage2/disk_io.c (set_bootdev): Mask 0x7F instead of 0x79 of
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| /titanic_50/usr/src/cmd/cmd-inet/sbin/dhcpagent/ |
| H A D | README.v6 | 203 in IPv4 would have been the use of ICMP Address Mask Request /
|