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Searched refs:MSR_MC_STATUS_PCC (Results 1 – 3 of 3) sorted by relevance

/titanic_50/usr/src/uts/intel/sys/
H A Dmca_x86.h190 #define MSR_MC_STATUS_PCC 0x0200000000000000ULL macro
/titanic_50/usr/src/uts/i86pc/cpu/genuineintel/
H A Dgintel_main.c177 } else if ((status & MSR_MC_STATUS_PCC) == 0) { in gintel_error_action()
/titanic_50/usr/src/uts/i86pc/cpu/generic_cpu/
H A Dgcpu_mca.c1404 pcc = (mcistatus & MSR_MC_STATUS_PCC) != 0; in gcpu_mca_process()
1506 ((status) & (MSR_MC_STATUS_UC | MSR_MC_STATUS_PCC)) != 0)