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Searched refs:MSR_MC_STATUS_CEC_MASK (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/intel/sys/
H A Dmca_x86.h194 #define MSR_MC_STATUS_CEC_MASK 0x001fffc000000000ULL macro
/titanic_50/usr/src/uts/i86pc/cpu/generic_cpu/
H A Dgcpu_mca.c1522 !(status & MSR_MC_STATUS_CEC_MASK)))) { in gcpu_cmci_logout()