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Searched refs:MDIO_WC_REG_TX66_CONTROL (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dclc_reg.h641 #define MDIO_WC_REG_TX66_CONTROL 0x83b0 macro
/titanic_50/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c4235 MDIO_WC_REG_TX66_CONTROL, 0x9); in elink_warpcore_set_10G_KR()