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Searched refs:MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X3 (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dclc_reg.h620 #define MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X3 0x8302 macro
/titanic_50/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c4263 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X3, 0x1); in elink_warpcore_set_10G_XFI()
4356 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X3, in elink_warpcore_set_10G_XFI()
4595 {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X3, in elink_warpcore_clear_regs()