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Searched refs:MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2 (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dclc_reg.h619 #define MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2 0x8301 macro
/titanic_50/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c4036 {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, 0x7}, in elink_warpcore_enable_AN_KR()
4062 u16 addr = MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2; in elink_warpcore_enable_AN_KR()
4189 {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, 0x7}, in elink_warpcore_set_10G_KR()
4287 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, &val); in elink_warpcore_set_10G_XFI()
4289 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, in elink_warpcore_set_10G_XFI()
4542 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, &digctrl_kx2); in elink_warpcore_set_sgmii_speed()
4544 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, in elink_warpcore_set_sgmii_speed()
4549 MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, in elink_warpcore_set_sgmii_speed()
4593 {MDIO_WC_DEVAD, MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X2, in elink_warpcore_clear_regs()