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Searched refs:MC_CHIP_DIMMRANKMAX (Results 1 – 4 of 4) sorted by relevance

/titanic_50/usr/src/uts/intel/io/mc-amd/
H A Dmcamd.h107 mc_cs_t *mcd_cs[MC_CHIP_DIMMRANKMAX]; /* associated chip-selects */
108 const mcdcfg_csl_t *mcd_csl[MC_CHIP_DIMMRANKMAX]; /* cs lines */
H A Dmcamd_subr.c129 for (i = 0; i < MC_CHIP_DIMMRANKMAX; i++) { in mcamd_cs_next()
133 if (i == MC_CHIP_DIMMRANKMAX) in mcamd_cs_next()
137 if (i == MC_CHIP_DIMMRANKMAX - 1) in mcamd_cs_next()
H A Dmcamd_drv.c306 uint64_t csnums[MC_CHIP_DIMMRANKMAX]; in mc_nvl_add_dimmlist()
316 for (i = 0; i < MC_CHIP_DIMMRANKMAX; i++) { in mc_nvl_add_dimmlist()
438 for (i = 0; i < MC_CHIP_DIMMRANKMAX; i++) { in mc_dimm_csadd()
449 ASSERT(i != MC_CHIP_DIMMRANKMAX); in mc_dimm_csadd()
/titanic_50/usr/src/uts/intel/sys/
H A Dmc_amd.h120 #define MC_CHIP_DIMMRANKMAX 4 /* largest number of ranks per dimm */ macro