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Searched refs:IXGBE_RQSMR (Results 1 – 4 of 4) sorted by relevance

/titanic_50/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_dcb_82598.c322 reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(i)); in ixgbe_dcb_config_tc_stats_82598()
324 IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), reg); in ixgbe_dcb_config_tc_stats_82598()
325 reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(i + 1)); in ixgbe_dcb_config_tc_stats_82598()
327 IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i + 1), reg); in ixgbe_dcb_config_tc_stats_82598()
H A Dixgbe_dcb_82599.c395 IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), reg); in ixgbe_dcb_config_tc_stats_82599()
440 IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), reg); in ixgbe_dcb_config_tc_stats_82599()
472 IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), 0x03020100); in ixgbe_dcb_config_tc_stats_82599()
H A Dixgbe_type.h946 #define IXGBE_RQSMR(_i) (0x02300 + ((_i) * 4)) macro
/titanic_50/usr/src/uts/common/io/ixgbe/
H A Dixgbe_main.c2503 ring_mapping = IXGBE_READ_REG(hw, IXGBE_RQSMR(index >> 2)); in ixgbe_setup_rx()
2505 IXGBE_WRITE_REG(hw, IXGBE_RQSMR(index >> 2), ring_mapping); in ixgbe_setup_rx()