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Searched refs:IXGBE_RDRXCTL_MCEN (Results 1 – 3 of 3) sorted by relevance

/titanic_50/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_dcb_82598.h54 #define IXGBE_RDRXCTL_MCEN 0x00000040 /* DMA config for multiple cores macro
H A Dixgbe_dcb_82599.h66 #define IXGBE_RDRXCTL_MCEN 0x00000040 /* DMA config for multiple cores macro
H A Dixgbe_dcb_82598.c155 reg |= IXGBE_RDRXCTL_MCEN; in ixgbe_dcb_config_rx_arbiter_82598()