Searched refs:ISR (Results 1 – 9 of 9) sorted by relevance
/titanic_50/usr/src/uts/i86pc/boot/ |
H A D | boot_serial.h | 38 #define ISR 2 /* ... intr status reg */ macro 45 #define FIFOR ISR /* ... fifo write reg */
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H A D | boot_console.c | 159 outb(port + ISR, 0x20); in serial_init() 160 if (inb(port + ISR) & 0x20) { in serial_init() 165 outb(port + ISR, 0x40); /* set to bank 2 */ in serial_init() 168 outb(port + ISR, 0x00); /* set to bank 0 */ in serial_init() 181 if ((inb(port + ISR) & 0xc0) != 0xc0) { in serial_init()
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/titanic_50/usr/src/uts/common/sys/ |
H A D | asy.h | 61 #define ISR 2 /* interrupt status register */ macro 69 #define FIFOR ISR /* FIFO register for 16550 */ 70 #define EFR ISR /* Enhanced feature register for 16650 */
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/titanic_50/usr/src/uts/sun4/sys/ |
H A D | sudev.h | 52 #define ISR 2 /* interrupt status register */ macro 60 #define FIFOR ISR /* FIFO register for 16550 */
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/titanic_50/usr/src/uts/common/io/sfe/ |
H A D | sfereg.h | 125 #define ISR 0x10 /* Interrupt status register */ macro
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H A D | sfe.c | 538 lp->isr_pended |= INL(dp, ISR) & lp->our_intr_bits; in sfe_reset_chip_sis900() 551 done |= INL(dp, ISR) & (ISR_TXRCMP | ISR_RXRCMP); in sfe_reset_chip_sis900() 592 lp->isr_pended |= INL(dp, ISR) & lp->our_intr_bits; in sfe_reset_chip_dp83815() 946 val = INL(dp, ISR); in sfe_stop_chip() 986 val = INL(dp, ISR); in sfe_stop_chip_quiesce() 1553 isr = INL(dp, ISR); in sfe_interrupt()
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/titanic_50/usr/src/grub/grub-0.97/netboot/ |
H A D | ns83820.c | 272 #define ISR 0x10 macro 658 u32 isr = readl(ns->base + ISR); in ns83820_check_intr() 727 u32 isr = readl(ns->base + ISR); in ns83820_transmit()
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/titanic_50/usr/src/uts/sun4/io/ |
H A D | su_driver.c | 367 if (ddi_get8(handle, addr+ISR) & 0x30) { in asyprobe() 577 OUTB(ISR, 0x20); in asyattach() 578 if (INB(ISR) & 0x20) { /* 82510 chip is present */ in asyattach() 586 OUTB(ISR, 0x40); /* set to bank 2 */ in asyattach() 589 OUTB(ISR, 0x00); /* set to bank 0 */ in asyattach() 600 if ((INB(ISR) & 0xc0) == 0xc0) in asyattach() 1419 (void) INB(ISR); in asy_program() 1639 interrupt_id = INB(ISR) & 0x0F; in asyintr() 1699 OUTB(ISR, 0x00); /* set bank 0 */ in asyintr()
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/titanic_50/usr/src/uts/common/io/ |
H A D | asy.c | 1302 ret = ddi_get8(asy->asy_iohandle, asy->asy_ioaddr + ISR); in asy_identify_chip() 2065 (void) ddi_get8(asy->asy_iohandle, asy->asy_ioaddr + ISR); in asy_program() 2238 asy->asy_ioaddr + ISR) & 0x0F; in asyintr() 2275 (ddi_get8(asy->asy_iohandle, asy->asy_ioaddr + ISR) & 0x0F)) { in asyintr()
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