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Searched refs:IA32_MSR_MC (Results 1 – 5 of 5) sorted by relevance

/titanic_50/usr/src/uts/i86pc/cpu/generic_cpu/
H A Dgcpu_mca.c590 i, IA32_MSR_MC(i, STATUS), in gcpu_bleat()
599 i, IA32_MSR_MC(i, STATUS), in gcpu_bleat()
607 i, IA32_MSR_MC(i, STATUS), in gcpu_bleat()
615 i, IA32_MSR_MC(i, STATUS), in gcpu_bleat()
742 IA32_MSR_MC(bankno, CTL), in gcpu_ereport_add_logout()
1299 (void) cmi_hdl_rdmsr(hdl, IA32_MSR_MC(i, CTL), in gcpu_mca_init()
1302 (void) cmi_hdl_rdmsr(hdl, IA32_MSR_MC(i, STATUS), in gcpu_mca_init()
1307 (void) cmi_hdl_rdmsr(hdl, IA32_MSR_MC(i, ADDR), in gcpu_mca_init()
1329 (void) cmi_hdl_wrmsr(hdl, IA32_MSR_MC(i, CTL), in gcpu_mca_init()
1334 (void) cmi_hdl_wrmsr(hdl, IA32_MSR_MC(i, STATUS), in gcpu_mca_init()
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H A Dgcpu_poll_ntv.c131 IA32_MSR_MC(i, STATUS), 0ULL); in gcpu_ntv_mca_poll()
/titanic_50/usr/src/uts/i86xpv/cpu/generic_cpu/
H A Dgcpu_mca_xpv.c122 mcrp->cmr_msrnum = IA32_MSR_MC(mib->mc_bank, STATUS); in gcpu_xpv_proxy_logout()
126 mcrp->cmr_msrnum = IA32_MSR_MC(mib->mc_bank, ADDR); in gcpu_xpv_proxy_logout()
130 mcrp->cmr_msrnum = IA32_MSR_MC(mib->mc_bank, MISC); in gcpu_xpv_proxy_logout()
/titanic_50/usr/src/uts/intel/sys/
H A Dmca_x86.h94 #define IA32_MSR_MC(i, which) \ macro
/titanic_50/usr/src/uts/i86pc/os/
H A Dcmi_hw.c1030 (((msr) >= IA32_MSR_MC(0, CTL) && (msr) <= IA32_MSR_MC(10, MISC)) || \