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Searched refs:I40E_WRITE_REG (Results 1 – 4 of 4) sorted by relevance

/titanic_50/usr/src/uts/common/io/i40e/
H A Di40e_intr.c194 I40E_WRITE_REG(hw, I40E_PFINT_ITR0(itr), val); in i40e_intr_set_itr()
199 I40E_WRITE_REG(hw, I40E_PFINT_ITRN(itr, i), val); in i40e_intr_set_itr()
218 I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0, reg); in i40e_intr_adminq_enable()
229 I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTL0, reg); in i40e_intr_adminq_disable()
249 I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTLN(vector - 1), reg); in i40e_intr_io_enable()
260 I40E_WRITE_REG(hw, I40E_PFINT_DYN_CTLN(vector - 1), reg); in i40e_intr_io_disable()
283 I40E_WRITE_REG(hw, I40E_QINT_RQCTL(I40E_INTR_NOTX_QUEUE), reg); in i40e_intr_io_enable_all()
287 I40E_WRITE_REG(hw, I40E_QINT_TQCTL(I40E_INTR_NOTX_QUEUE), reg); in i40e_intr_io_enable_all()
311 I40E_WRITE_REG(hw, I40E_QINT_RQCTL(I40E_INTR_NOTX_QUEUE), reg); in i40e_intr_io_disable_all()
315 I40E_WRITE_REG(hw, I40E_QINT_TQCTL(I40E_INTR_NOTX_QUEUE), reg); in i40e_intr_io_disable_all()
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H A Di40e_main.c2386 I40E_WRITE_REG(hw, I40E_PFQF_HLUT(i), hlut[i]); in i40e_config_rss_hlut()
2581 I40E_WRITE_REG(hw, I40E_QRX_ENA(i), reg); in i40e_shutdown_rx_rings()
2639 I40E_WRITE_REG(hw, I40E_QTX_ENA(i), reg); in i40e_shutdown_tx_rings()
2806 I40E_WRITE_REG(hw, I40E_QRX_TAIL(i), 0); in i40e_setup_rx_rings()
2807 I40E_WRITE_REG(hw, I40E_QRX_TAIL(i), rxd->rxd_ring_size - 1); in i40e_setup_rx_rings()
2816 I40E_WRITE_REG(hw, I40E_QRX_ENA(i), reg); in i40e_setup_rx_rings()
2948 I40E_WRITE_REG(hw, I40E_QTX_CTL(itrq->itrq_index), reg); in i40e_setup_tx_rings()
2958 I40E_WRITE_REG(hw, I40E_QTX_ENA(i), reg); in i40e_setup_tx_rings()
H A Di40e_osdep.h177 #define I40E_WRITE_REG wr32 macro
H A Di40e_transceiver.c1623 I40E_WRITE_REG(hw, I40E_QRX_TAIL(itrq->itrq_index), tail); in i40e_ring_rx()
2991 I40E_WRITE_REG(hw, I40E_QTX_TAIL(itrq->itrq_index), in i40e_ring_tx()