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Searched refs:GPC_RST_SET (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/common/io/yge/
H A Dyge.h1795 #define GPC_RST_SET BIT(0) /* Set GPHY Reset */ macro
H A Dyge.c757 CSR_WRITE_4(dev, MR_ADDR(i, GPHY_CTRL), GPC_RST_SET); in yge_reset()