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Searched refs:F_PL_INTR_SGE_DATA (Results 1 – 3 of 3) sorted by relevance

/titanic_50/usr/src/uts/common/io/chxge/
H A Dsge.c499 #define SGE_PL_INTR_MASK (F_PL_INTR_SGE_ERR | F_PL_INTR_SGE_DATA)
605 t1_write_reg_4(adapter, A_PL_CAUSE, F_PL_INTR_SGE_DATA); in sge_data_in()
/titanic_50/usr/src/uts/common/io/chxge/com/
H A Dch_subr.c228 cause &= ~F_PL_INTR_SGE_DATA; in fpga_slow_intr()
H A Dregs.h1737 #define F_PL_INTR_SGE_DATA V_PL_INTR_SGE_DATA(1U) macro