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Searched refs:F_PL_INTR_MC5 (Results 1 – 3 of 3) sorted by relevance

/titanic_50/usr/src/uts/common/io/chxge/com/
H A Dmc5.c523 pl_intr | F_PL_INTR_MC5); in t1_mc5_intr_enable()
541 pl_intr & ~F_PL_INTR_MC5); in t1_mc5_intr_disable()
554 t1_write_reg_4(mc5->adapter, A_PL_CAUSE, F_PL_INTR_MC5); in t1_mc5_intr_clear()
H A Dch_subr.c984 F_PL_INTR_ULP | F_PL_INTR_MC5; in t1_interrupts_enable()
1122 if (cause & F_PL_INTR_MC5) in asic_slow_intr()
H A Dregs.h1749 #define F_PL_INTR_MC5 V_PL_INTR_MC5(1U) macro