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Searched refs:F_PL_INTR_MC3 (Results 1 – 3 of 3) sorted by relevance

/titanic_50/usr/src/uts/common/io/chxge/com/
H A Dmc3.c52 t1_write_reg_4(mc3->adapter, A_PL_ENABLE, en | F_PL_INTR_MC3); in t1_mc3_intr_enable()
70 pl_intr & ~F_PL_INTR_MC3); in t1_mc3_intr_disable()
98 t1_write_reg_4(mc3->adapter, A_PL_CAUSE, F_PL_INTR_MC3); in t1_mc3_intr_clear()
H A Dch_subr.c983 adapter->slow_intr_mask |= F_PL_INTR_MC3 | F_PL_INTR_MC4 | in t1_interrupts_enable()
1116 if (cause & F_PL_INTR_MC3) in asic_slow_intr()
H A Dregs.h1741 #define F_PL_INTR_MC3 V_PL_INTR_MC3(1U) macro