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Searched refs:FPGA_GMAC_ADDR_INTERRUPT_ENABLE (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/common/io/chxge/com/
H A Dch_mac.c97 FPGA_GMAC_ADDR_INTERRUPT_ENABLE); in mac_intr_enable()
100 FPGA_GMAC_ADDR_INTERRUPT_ENABLE, mac_intr); in mac_intr_enable()
123 FPGA_GMAC_ADDR_INTERRUPT_ENABLE); in mac_intr_disable()
126 FPGA_GMAC_ADDR_INTERRUPT_ENABLE, mac_intr); in mac_intr_disable()
H A Dfpga_defs.h65 #define FPGA_GMAC_ADDR_INTERRUPT_ENABLE 0xA30 macro