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Searched refs:FLOW_CONTROL (Results 1 – 3 of 3) sorted by relevance

/titanic_50/usr/src/uts/common/io/dmfe/
H A Ddmfe.h343 #define FLOW_CONTROL 0x00000400UL macro
/titanic_50/usr/src/uts/intel/io/amd8111s/
H A Damd8111s_hw.h292 #define FLOW_CONTROL 0xC8 /* 32bit register */ macro
H A Damd8111s_hw.c257 WRITE_REG32(pLayerPointers, MemBaseAddress + FLOW_CONTROL, 0); in mdlClearHWConfig()
1698 + FLOW_CONTROL, VAL2 | FIXP | FCCMD | 0x200); in mdlSendPause()