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Searched refs:ERR0_THR_WR (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/intel/io/intel_nb5000/
H A Dnb5000_init.c1413 ERR0_THR_WR(0xffff); in nb_thr_init()
1434 ERR0_THR_WR(err0_thr); in nb_thr_init()
1446 ERR0_THR_WR(0xffff); in nb_thr_fini()
1452 ERR0_THR_WR(nb_err0_thr); in nb_thr_fini()
H A Dnb5000.h1415 #define ERR0_THR_WR(val) nb_pci_putw(0, 16, 2, 0xf8, val) macro