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Searched refs:DSPBBASE (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/intel/io/drm/
H A Di915_drv.c500 s3_priv->saveDSPBBASE = S3_READ(DSPBBASE); in i915_save_display()
623 S3_WRITE(DSPBBASE, s3_priv->saveDSPBBASE); in i915_restore_display()
633 S3_WRITE(DSPBBASE, S3_READ(DSPBBASE)); in i915_restore_display()
H A Di915_drv.h1121 #define DSPBBASE 0x71184 macro
1122 #define DSPBADDR DSPBBASE