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Searched refs:DR_TRAP1 (Results 1 – 1 of 1) sorted by relevance

/titanic_50/usr/src/uts/intel/sys/
H A Ddebugreg.h56 #define DR_TRAP1 0x2 /* Trap from debug register #1 */ macro
83 #define DR_TRAPS (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)