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Searched refs:DEBUGOUT1 (Results 1 – 23 of 23) sorted by relevance

/titanic_50/usr/src/uts/common/io/ixgbe/
H A Dixgbe_debug.h76 #define DEBUGOUT1(S, A) \ macro
93 #define ERROR_REPORT2(S, A, B) DEBUGOUT1(S ":" A, B)
99 #define DEBUGOUT1(S, A)
/titanic_50/usr/src/uts/common/io/e1000g/
H A De1000_osdep.h63 #define DEBUGOUT1(S, A) \ macro
73 #define DEBUGOUT1(S, A)
/titanic_50/usr/src/uts/common/io/i40e/core/
H A Di40e_lan_hmc.c339 DEBUGOUT1("i40e_create_lan_hmc_object: returns error %d\n", in i40e_create_lan_hmc_object()
346 DEBUGOUT1("i40e_create_lan_hmc_object: returns error %d\n", in i40e_create_lan_hmc_object()
508 DEBUGOUT1("i40e_configure_lan_hmc: Unknown SD type: %d\n", in i40e_configure_lan_hmc()
591 DEBUGOUT1("i40e_delete_hmc_object: returns error %d\n", in i40e_delete_lan_hmc_object()
599 DEBUGOUT1("i40e_delete_hmc_object: returns error %d\n", in i40e_delete_lan_hmc_object()
1259 DEBUGOUT1("i40e_hmc_get_object_va: returns error %d\n", in i40e_hmc_get_object_va()
H A Di40e_common.c1189 DEBUGOUT1("Failed to read PBA Block word %d.\n", i); in i40e_read_pba_string()
1299 DEBUGOUT1("Core and Global modules ready %d\n", cnt1); in i40e_pf_reset()
1307 DEBUGOUT1("I40E_GLNVM_ULD = 0x%x\n", reg); in i40e_pf_reset()
1538 DEBUGOUT1("invalid mode passed in %X\n", mode); in i40e_led_set()
/titanic_50/usr/src/grub/grub-0.97/netboot/
H A De1000.c136 #define DEBUGOUT1(S,A) printf(S,A) macro
142 #define DEBUGOUT1(S,A) macro
1325 DEBUGOUT1("After fix-ups FlowControl is now = %x\n", hw->fc);
1570 DEBUGOUT1("Phy ID = %x \n", hw->phy_id);
1925 DEBUGOUT1("autoneg_advertised %x\n", hw->autoneg_advertised);
2019 DEBUGOUT1("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg);
2846 DEBUGOUT1("PHY Address %d is out of range\n", reg_addr);
2949 DEBUGOUT1("PHY Address %d is out of range\n", reg_addr);
3122 DEBUGOUT1("Invalid MAC type %d\n", hw->mac_type);
3128 DEBUGOUT1("PHY ID 0x%X detected\n", hw->phy_id);
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/titanic_50/usr/src/uts/common/io/e1000api/
H A De1000_vf.c419 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count); in e1000_update_mc_addr_list_vf()
431 DEBUGOUT1("Hash value = 0x%03X\n", hash_value); in e1000_update_mc_addr_list_vf()
H A De1000_phy.c292 DEBUGOUT1("PHY Address %d is out of range\n", offset); in e1000_read_phy_reg_mdic()
357 DEBUGOUT1("PHY Address %d is out of range\n", offset); in e1000_write_phy_reg_mdic()
472 DEBUGOUT1("PHY I2C Address %d is out of range.\n", in e1000_write_phy_reg_i2c()
712 DEBUGOUT1("Setting page 0x%x\n", page); in e1000_set_page_igp()
1511 DEBUGOUT1("autoneg_advertised %x\n", phy->autoneg_advertised); in e1000_phy_setup_autoneg()
1605 DEBUGOUT1("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); in e1000_phy_setup_autoneg()
1773 DEBUGOUT1("IGP PSCR: %X\n", phy_data); in e1000_phy_force_speed_duplex_igp()
1831 DEBUGOUT1("M88E1000 PSCR: %X\n", phy_data); in e1000_phy_force_speed_duplex_m88()
1976 DEBUGOUT1("IFE PMC: %X\n", data); in e1000_phy_force_speed_duplex_ife()
3441 DEBUGOUT1("Attempting to access page %d while gig enabled.\n", in e1000_access_phy_wakeup_reg_bm()
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H A De1000_ich8lan.c1169 DEBUGOUT1("Invalid LTR latency scale %d\n", scale); in e1000_platform_pm_pch_lpt()
1191 DEBUGOUT1("Invalid high water mark %d\n", obff_hwm); in e1000_platform_pm_pch_lpt()
1237 DEBUGOUT1("Invalid OBFF timer %d\n", timer); in e1000_set_obff_timer_pch_lpt()
1383 DEBUGOUT1("Error in ULP enable flow: %d\n", ret_val); in e1000_enable_ulp_lpt_lp()
1439 DEBUGOUT1("ULP_CONFIG_DONE cleared after %dmsec\n", i * 10); in e1000_disable_ulp_lpt_lp()
1528 DEBUGOUT1("Error in ULP disable flow: %d\n", ret_val); in e1000_disable_ulp_lpt_lp()
2054 DEBUGOUT1("Failed to write receive address at index %d\n", index); in e1000_rar_set_pch2lan()
2133 DEBUGOUT1("Failed to write receive address at index %d\n", index); in e1000_rar_set_pch_lpt()
3571 DEBUGOUT1("NVM read error: %d\n", ret_val); in e1000_read_nvm_spt()
3633 DEBUGOUT1("NVM read error: %d\n", ret_val); in e1000_read_nvm_ich8lan()
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H A De1000_i210.c407 DEBUGOUT1("Requested word 0x%02x not found in OTP\n", address); in e1000_read_invm_word_i210()
484 DEBUGOUT1("NVM word 0x%02x is not mapped.\n", offset); in e1000_read_invm_i210()
H A De1000_mac.c383 DEBUGOUT1("Clearing RAR[1-%u]\n", rar_count-1); in e1000_init_rx_addrs_generic()
1028 DEBUGOUT1("After fix-ups FlowControl is now = %x\n", in e1000_setup_link_generic()
1314 DEBUGOUT1("hw->fc.current_mode = %u\n", hw->fc.current_mode); in e1000_force_mac_fc_generic()
2248 DEBUGOUT1("Reg %08x did not indicate ready\n", reg); in e1000_write_8bit_ctrl_reg_generic()
H A De1000_82575.c605 DEBUGOUT1("PHY Address %u is out of range\n", offset); in e1000_read_phy_reg_sgmii_82575()
638 DEBUGOUT1("PHY Address %d is out of range\n", offset); in e1000_write_phy_reg_sgmii_82575()
737 DEBUGOUT1("PHY address %u was unreadable\n", in e1000_get_phy_id_82575()
1747 DEBUGOUT1("Configuring Autoneg:PCS_LCTL=0x%08X\n", reg); in e1000_setup_serdes_link_82575()
1755 DEBUGOUT1("Configuring Forced Link:PCS_LCTL=0x%08X\n", reg); in e1000_setup_serdes_link_82575()
3641 DEBUGOUT1("I2C data was not set to %X\n", data); in e1000_clock_out_i2c_bit()
3717 DEBUGOUT1("Error - I2C data was not set to %X.\n", data); in e1000_set_i2c_data()
H A De1000_82542.c339 DEBUGOUT1("After fix-ups FlowControl is now = %x\n", in e1000_setup_link_82542()
H A De1000_82543.c495 DEBUGOUT1("PHY Address %d is out of range\n", offset); in e1000_read_phy_reg_82543()
551 DEBUGOUT1("PHY Address %d is out of range\n", offset); in e1000_write_phy_reg_82543()
H A De1000_nvm.c586 DEBUGOUT1("NVM read error: %d\n", ret_val); in e1000_read_nvm_eerd()
H A De1000_80003es2lan.c685 DEBUGOUT1("GG82563 PSCR: %X\n", phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
H A De1000_82571.c196 DEBUGOUT1("PHY ID unknown: type = 0x%08x\n", phy->id); in e1000_init_phy_params_82571()
/titanic_50/usr/src/uts/common/io/igb/
H A De1000_osdep.h62 #define DEBUGOUT1(S, A) IGB_DEBUGLOG_1(NULL, S, A) macro
H A Digb_main.c1393 DEBUGOUT1("igb_init: pba=%dK", pba); in igb_init_adapter()
/titanic_50/usr/src/uts/common/io/i40e/
H A Di40e_osdep.h31 #define DEBUGOUT1(S, A) i40e_debug(NULL, 0, S, A) macro
/titanic_50/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_vf.c403 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count); in ixgbe_update_mc_addr_list_vf()
411 DEBUGOUT1("Hash value = 0x%03X\n", vector); in ixgbe_update_mc_addr_list_vf()
H A Dixgbe_common.c343 DEBUGOUT1("Set up FC; PCS1GLCTL = 0x%08X\n", reg); in ixgbe_setup_fc_generic()
362 DEBUGOUT1("Set up FC; PCS1GLCTL = 0x%08X\n", reg); in ixgbe_setup_fc_generic()
1588 DEBUGOUT1("Detected EEPROM page size = %d words.", in ixgbe_detect_eeprom_page_size_generic()
2419 DEBUGOUT1("Clearing RAR[1-%d]\n", rar_entries - 1); in ixgbe_init_rx_addrs_generic()
2462 DEBUGOUT1("Added a secondary address to RAR[%d]\n", rar); in ixgbe_add_uc_addr()
2506 DEBUGOUT1("Clearing RAR[1-%d]\n", uc_addr_in_use+1); in ixgbe_update_uc_addr_list_generic()
2601 DEBUGOUT1(" bit-vector = 0x%03X\n", vector); in ixgbe_set_mta()
4390 DEBUGOUT1("Buffer length failure buffersize=%d.\n", length); in ixgbe_host_interface_command()
H A Dixgbe_82598.c954 DEBUGOUT1("RAR index %d is out of range.\n", rar); in ixgbe_set_vmdq_82598()
980 DEBUGOUT1("RAR index %d is out of range.\n", rar); in ixgbe_clear_vmdq_82598()
H A Dixgbe_phy.c531 DEBUGOUT1("phy type found is %d\n", phy_type); in ixgbe_get_phy_type_from_id()
1249 DEBUGOUT1("DELAY: %d MS\n", edata); in ixgbe_reset_phy_nl()