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Searched refs:COMMON_CLEAR_INTR_REG_IDLE (Results 1 – 4 of 4) sorted by relevance

/titanic_50/usr/src/uts/sun4u/io/pci/
H A Dpci_cb.c115 cb_set_nintr_reg(cb_p, ino, COMMON_CLEAR_INTR_REG_IDLE); in cb_enable_nintr()
182 cb_set_nintr_reg(cb_p, ino, COMMON_CLEAR_INTR_REG_IDLE); in cb_clear_nintr()
257 cb_set_nintr_reg(cb_p, ino, COMMON_CLEAR_INTR_REG_IDLE); in cb_resume()
/titanic_50/usr/src/uts/sun4u/sys/pci/
H A Dpci_regs.h88 #define COMMON_CLEAR_INTR_REG_IDLE 0x0000000000000000ull macro
H A Dpci_ib.h172 #define IB_INO_INTR_CLEAR(reg_p) *(reg_p) = COMMON_CLEAR_INTR_REG_IDLE
/titanic_50/usr/src/uts/sun4u/starcat/io/
H A Ddrmach.c8093 COMMON_CLEAR_INTR_REG_IDLE) { in drmach_s1p_intr_map_reg_save()
8122 COMMON_CLEAR_INTR_REG_IDLE) { in drmach_s1p_intr_map_reg_save()
8287 COMMON_CLEAR_INTR_REG_IDLE); in drmach_s1p_decode_slot_intr()