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Searched refs:CHIP_REV (Results 1 – 7 of 7) sorted by relevance

/titanic_50/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dlm_nvram.c162 if (CHIP_REV(pdev) == CHIP_REV_EMUL) cnt *= 100;
205 if (CHIP_REV(pdev) == CHIP_REV_EMUL) cnt *= 100;
H A Dlm_hw_init_reset.c2251 DbgMessage(pdev, INFORMi, "chipid is 0x%x, rev is 0x%x\n", CHIP_NUM(pdev), CHIP_REV(pdev)); in lm_init_get_modes_bitmap()
2264 chip_rev = CHIP_REV(pdev); in lm_init_get_modes_bitmap()
/titanic_50/usr/src/uts/sun4u/sys/pci/
H A Dpci_var.h77 #define CHIP_REV(pci_p) (PCI_CHIP_ID(pci_p) & 0xFF) macro
/titanic_50/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/include/
H A Dlm5710.h1689 #define CHIP_REV(_p) (((_p)->hw_info.chip_id) & CHIP_REV_MASK) macro
1696 #define CHIP_REV_IS_SLOW(_p) (CHIP_REV(_p) > CHIP_REV_ASIC_MAX)
1697 …#define CHIP_REV_IS_FPGA(_p) (CHIP_REV_IS_SLOW(_p) && (CHIP_REV(_p) & CHIP_REV_SIM_IS_FPGA))
1698 …#define CHIP_REV_IS_EMUL(_p) (CHIP_REV_IS_SLOW(_p) && !(CHIP_REV(_p)& CHIP_REV_SIM_IS_FPGA)…
1700 …#define CHIP_REV_SIM(_p) ((0xF - (CHIP_REV(_p)>>CHIP_REV_SHIFT))>>1)<<CHIP_REV_SHIFT //…
1702 …#define CHIP_IS_E3B0(_p) (CHIP_IS_E3(_p)&&( (CHIP_REV(_p) == CHIP_REV_Bx)||(CHIP_REV_SI…
1704 …#define CHIP_IS_E3A0(_p) (CHIP_IS_E3(_p)&&( (CHIP_REV(_p) == CHIP_REV_Ax)||(CHIP_REV_SI…
/titanic_50/usr/src/uts/sun4u/sunfire/sys/
H A Dfhc.h189 #define CHIP_REV(c) ((c) >> 28) macro
/titanic_50/usr/src/uts/sun4u/sunfire/io/
H A Dfhc.c2207 if ((CHIP_REV(ac_comp) >= 4) || (CHIP_REV(ac_comp) == 0)) { in calibrate_temp()
/titanic_50/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c89 #define CHIP_REV(_chip_id) ((_chip_id) & CHIP_REV_MASK) macro
94 (CHIP_REV(_chip_id) > 0x00005000)
97 (CHIP_REV(_chip_id) & 0x00001000))
100 !(CHIP_REV(_chip_id) & 0x00001000))
148 #define CHIP_REV_SIM(_p) (((0xF - (CHIP_REV(_p) >> CHIP_REV_SHIFT)) \
152 ((CHIP_REV(_p) == CHIP_REV_Bx) || \
156 ((CHIP_REV(_p) == CHIP_REV_Ax) || \
13076 if (CHIP_REV(chip_id) == CHIP_REV_Ax) in elink_populate_int_phy()