Searched refs:BIT_8 (Results 1 – 11 of 11) sorted by relevance
78 #define PCI_X_BUS_MODE (BIT_8 | BIT_9 | BIT_10 | BIT_11)98 BIT_11 | BIT_10 | BIT_9 | BIT_8 | \106 #define RISC_PAUSED BIT_8
1057 mcp->to_fw_mask |= BIT_1 | BIT_8; in qlt_info()1350 DMEM_WR32(qlt, icb+0x64, BIT_14 | BIT_8 | BIT_7 | in qlt_port_online()2642 if (risc_status & BIT_8) { in qlt_isr()3079 mcp->to_fw_mask |= BIT_9 | BIT_8; in qlt_portid_to_handle()
74 #define BIT_8 0x00100 macro95 #define SKD_CONSTRUCTED BIT_8
168 #define BIT_8 0x100 macro638 #define RH_RISC_PAUSED BIT_8 /* RISC Paused bit. */1183 #define SRB_UB_CALLBACK BIT_8 /* Unsolicited callback needed. */1398 #define QL_MINOR_NODE_CREATED BIT_81694 #define MENLO_LOGIN_OPERATIONAL BIT_81715 #define RESET_ACTIVE BIT_81758 #define CFG_MULTI_CHIP_ADAPTER BIT_82144 #define PRLI_W3_RETRY BIT_8
270 #define IDC_TIMEOUT_MASK (BIT_11 | BIT_10 | BIT_9 | BIT_8)389 #define GID_FP_IN_ORDER BIT_8435 #define MBX_8 BIT_8
699 #define CFO_CLASS_2 BIT_8
39 #define BIT_8 0x100 macro
52 #define BIT_8 0x100 macro202 #define CSR_RR BIT_8415 #define RT_IDX_CAM_BIT0 BIT_8528 #define CQ_8_NOT_EMPTY BIT_8553 #define RISC_RESET BIT_81005 #define ADAPTER_SUSPENDED BIT_8
242 #define INIT_ADD_INTERRUPT BIT_8636 #define CFG_CKSUM_FULL_IPv6 BIT_8
571 (hccr_reg & (BIT_15 | BIT_13 | BIT_11 | BIT_8))) { in ql_handle_uncommon_risc_intr()
1777 if (pkt->log.io_param[0] & BIT_8) { in ql_log_iocb()