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Searched refs:BIT_6 (Results 1 – 19 of 19) sorted by relevance

/titanic_50/usr/src/uts/common/sys/fibre-channel/fca/qlc/
H A Dql_mbx.h297 #define IDC_RIT_MASK (BIT_6 | BIT_5 | BIT_4)
323 #define IDC_MS_MASK (BIT_7 | BIT_6 | BIT_5 | BIT_4)
363 #define MBC_ECHO_64BIT BIT_6 /* 64bit DMA address used */
437 #define MBX_6 BIT_6
475 #define FO1_DISABLE_GPIO BIT_6
531 #define FWATTRIB2_MQUE BIT_6
692 #define LINK_CONFIG_PAUSE_MASK (BIT_6 | BIT_5)
H A Dql_api.h166 #define BIT_6 0x40 macro
411 #define QL_DMA_ALIGN_64_BYTE_BOUNDARY (uint64_t)BIT_6
684 #define HC24_HOST_INT BIT_6 /* Host to RISC intrpt bit */
801 #define VPO_ENABLE_SNS_LOGIN_SCR BIT_6
1181 #define SRB_UB_IN_FCA BIT_6 /* FCA holds unsolicited buffer */
1310 #define TQF_PLOGI_PROGRS BIT_6
1396 #define QL_TASK_DAEMON_STARTED BIT_6
1692 #define IP_ENABLED BIT_6
1713 #define NEED_UNSOLICITED_BUFFERS BIT_6
1756 #define CFG_DISABLE_EXTENDED_LOGGING_TRACE BIT_6
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H A Dql_xioctl.h214 #define FLASH8192 BIT_6
240 #define LED_GREEN BIT_6
H A Dql_iocb.h89 #define CF_DATA_OUT BIT_6
353 #define SF_DATA_OUT BIT_6
704 #define CFO_EXPLICIT_LOGO BIT_6
/titanic_50/usr/src/cmd/picl/plugins/sun4u/snowbird/envmond/
H A Dpiclenvmond.h95 #define BIT_6(_X) ((_X) & 0x40) macro
/titanic_50/usr/src/uts/common/io/comstar/port/qlt/
H A Dqlt_regs.h99 BIT_7 | BIT_6 | BIT_5 | BIT_4 | \
108 #define FW_INTR_STATUS_MASK (BIT_7 | BIT_6 | BIT_5 | BIT_4 | \
H A Dqlt.c1517 mcp->from_fw_mask |= BIT_0 | BIT_1 | BIT_2 | BIT_3 | BIT_6 | BIT_7; in qlt_get_link_info()
2481 mcp->to_fw_mask |= BIT_2 | BIT_3 | BIT_7 | BIT_6; in qlt_alloc_mailbox_command()
3543 flags = (uint16_t)(BIT_6 | BIT_15 | in qlt_send_status()
3666 flags = (uint16_t)(flags | BIT_6); in qlt_send_status()
3778 req1f = BIT_6; in qlt_send_els_response()
4014 else if (tm & BIT_6) in qlt_handle_atio()
4486 ASSERT((flags & (BIT_6 | BIT_7)) == BIT_7); in qlt_handle_ctio_completion()
/titanic_50/usr/src/uts/common/io/skd/
H A Dskd.h72 #define BIT_6 0x00040 macro
93 #define SKD_REGS_MAPPED BIT_6
/titanic_50/usr/src/uts/common/sys/
H A Dstmf_defines.h37 #define BIT_6 0x40 macro
/titanic_50/usr/src/uts/common/sys/fibre-channel/fca/qlge/
H A Dqlge.h169 #define QL_DMA_ALIGN_64_BYTE_BOUNDARY (uint64_t)BIT_6
240 #define INIT_MEMORY_ALLOC BIT_6
634 #define CFG_CKSUM_PARTIAL BIT_6
H A Dqlge_hw.h50 #define BIT_6 0x40 macro
413 #define RT_IDX_ETH_FCOE BIT_6
526 #define CQ_6_NOT_EMPTY BIT_6
2321 #define FLASH8192 BIT_6
/titanic_50/usr/src/uts/common/io/fibre-channel/fca/qlc/
H A Dql_init.c627 (icb->firmware_options[0] | BIT_6 | BIT_1); in ql_nvram_config()
651 BIT_7 | BIT_6 | BIT_5 | BIT_2 | BIT_0); in ql_nvram_config()
670 (icb->firmware_options[1] | BIT_7 | BIT_6); in ql_nvram_config()
1012 nv->firmware_options_3[1] = BIT_6; in ql_nvram_24xx_config()
1124 BIT_6); in ql_nvram_24xx_config()
1517 ~(BIT_6 | BIT_5 | BIT_4)); in ql_23_properties()
1948 ~(BIT_6 | BIT_5 | BIT_4)); in ql_24xx_properties()
H A Dql_iocb.c1160 pkt->control_flags_l = BIT_6; in ql_ip_iocb()
H A Dql_mbx.c736 if (echo_pt->options & BIT_6) { in ql_echo()
2358 port_no = (uint8_t)(port_no | BIT_6); in ql_get_status_counts()
2590 BIT_1 : BIT_6); in ql_lip_reset()
H A Dql_ioctl.c631 nv->firmware_options_3[1] = BIT_6; in ql_set_nvram_adapter_defaults()
H A Dql_isr.c1725 if (pkt->entry_status & BIT_6) { in ql_error_entry()
H A Dql_api.c4338 *bptr & (BIT_6 | BIT_5 | BIT_4))) { in ql_port_manage()
4341 (*bptr & ~(BIT_6|BIT_5|BIT_4)); in ql_port_manage()
4448 (echo.options | BIT_6); in ql_port_manage()
/titanic_50/usr/src/uts/common/io/comstar/port/fcoet/
H A Dfcoet_eth.c592 } else if (tm & BIT_6) { in fcoet_process_unsol_fcp_cmd()
/titanic_50/usr/src/uts/common/io/fibre-channel/fca/emlxs/
H A Demlxs_fct.c2472 } else if (tm & BIT_6) {