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Searched refs:BIT_2 (Results 1 – 21 of 21) sorted by relevance

/titanic_50/usr/src/uts/common/sys/fibre-channel/fca/qlc/
H A Dql_mbx.h164 #define SE_MPI_RISC BIT_2
278 #define IDC_FUNC_SRC_MASK (BIT_3 | BIT_2 | BIT_1 | BIT_0)
289 #define IDC_FUNC_2 BIT_2
292 #define IDC_FC_FUNC (BIT_3 | BIT_2)
302 #define IDC_RIO_MASK (BIT_3 | BIT_2 | BIT_1 | BIT_0)
330 #define IDC_MM_MASK (BIT_3 | BIT_2 | BIT_1 | BIT_0)
441 #define MBX_2 BIT_2
527 #define FWATTRIB2_MID BIT_2
699 #define LINK_CONFIG_LB_MODE_MASK (BIT_3 | BIT_2 | BIT_1)
H A Dql_api.h162 #define BIT_2 0x4 macro
349 #define QL_F_PORT BIT_2
545 #define NV_DATA_OUT BIT_2
805 #define VPO_ID_NOT_ACQUIRED BIT_2
1177 #define SRB_RETRY BIT_2 /* Driver retrying command. */
1306 #define TQF_FABRIC_DEVICE BIT_2
1368 #define QL_DUMP_UPLOADED BIT_2
1392 #define QL_HBA_BUFFER_SETUP BIT_2
1688 #define ONLINE BIT_2
1709 #define TASK_DAEMON_ALIVE_FLG BIT_2
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H A Dql_xioctl.h210 #define FLASH512S BIT_2
248 #define LED_YELLOW_24 BIT_2
300 #define FTYPE_EFI BIT_2
H A Dql_iocb.h86 #define CF_OTAG BIT_2
181 #define CF_DSD_PTR BIT_2
323 #define RF_INV_E_TYPE BIT_2 /* Invalid entry type. */
331 #define FCP_RESID_OVER BIT_2
344 #define SF_SENT_CMD BIT_2
357 #define SF_ORDERED_Q BIT_2
633 #define CF_CLEAR_TASK_SET BIT_2
1423 #define VMF_DO_NOT_RESET BIT_2
H A Dql_init.h892 #define NV_START_BIT BIT_2
/titanic_50/usr/src/uts/common/io/comstar/port/qlt/
H A Dqlt_regs.h80 #define PCI_64_BIT_SLOT BIT_2
100 BIT_3 | BIT_2 | BIT_1)
109 BIT_3 | BIT_2 | BIT_1 | BIT_0)
H A Dqlt.c1058 mcp->from_fw_mask |= BIT_1 | BIT_2; in qlt_info()
1348 BIT_2 | BIT_1 | BIT_0); in qlt_port_online()
1438 mcp->from_fw_mask = BIT_11 | BIT_10 | BIT_3 | BIT_2 | BIT_1 | in qlt_port_online()
1517 mcp->from_fw_mask |= BIT_0 | BIT_1 | BIT_2 | BIT_3 | BIT_6 | BIT_7; in qlt_get_link_info()
2481 mcp->to_fw_mask |= BIT_2 | BIT_3 | BIT_7 | BIT_6; in qlt_alloc_mailbox_command()
3080 mcp->from_fw_mask |= BIT_1 | BIT_2; in qlt_portid_to_handle()
3623 fcp_rsp_iu[10] = (uint8_t)(fcp_rsp_iu[10] | BIT_2); in qlt_send_status()
4008 else if (tm & BIT_2) in qlt_handle_atio()
/titanic_50/usr/src/uts/common/io/fibre-channel/fca/qlc/
H A Dql_init.c388 w16 = (uint16_t)(w16 & ~(BIT_3 & BIT_2)); in ql_set_max_read_req()
497 nv->firmware_options[0] = BIT_4 | BIT_3 | BIT_2 | BIT_1; in ql_nvram_config()
498 nv->firmware_options[1] = BIT_7 | BIT_5 | BIT_2; in ql_nvram_config()
565 nv->host_p[1] = BIT_2; in ql_nvram_config()
648 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); in ql_nvram_config()
651 BIT_7 | BIT_6 | BIT_5 | BIT_2 | BIT_0); in ql_nvram_config()
690 nv->host_p[1] & BIT_2 ? (ha->cfg_flags |= CFG_ENABLE_FULL_LIP_LOGIN) : in ql_nvram_config()
748 (ip_icb->ip_firmware_options[0] | BIT_2 | BIT_0); in ql_nvram_config()
751 (ip_icb->ip_firmware_options[0] | BIT_2); in ql_nvram_config()
1008 nv->firmware_options_1[0] = BIT_2 | BIT_1; in ql_nvram_24xx_config()
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H A Dql_ioctl.c627 nv->firmware_options_1[0] = BIT_2 | BIT_1; in ql_set_nvram_adapter_defaults()
637 nv->host_p[1] = BIT_3 | BIT_2; in ql_set_nvram_adapter_defaults()
699 nv->firmware_options[0] = BIT_4 | BIT_3 | BIT_2 | BIT_1; in ql_set_nvram_adapter_defaults()
700 nv->firmware_options[1] = BIT_7 | BIT_5 | BIT_2; in ql_set_nvram_adapter_defaults()
715 nv->host_p[1] = BIT_2; in ql_set_nvram_adapter_defaults()
H A Dql_isr.c1733 } else if (pkt->entry_status & BIT_2) { in ql_error_entry()
1771 if (pkt->entry_status & (BIT_5 + BIT_4 + BIT_3 + BIT_2)) { in ql_error_entry()
/titanic_50/usr/src/cmd/picl/plugins/sun4u/snowbird/envmond/
H A Dpiclsensors.h70 #define LOW_POWEROFF_BIT(_X) (BIT_2(_X))
H A Dpiclenvmond.h91 #define BIT_2(_X) ((_X) & 0x04) macro
/titanic_50/usr/src/uts/common/sys/
H A Dstmf_defines.h33 #define BIT_2 0x4 macro
/titanic_50/usr/src/uts/common/sys/fibre-channel/fca/qlge/
H A Dqlge_hw.h46 #define BIT_2 0x4 macro
409 #define RT_IDX_MCAST_MATCH BIT_2
522 #define CQ_2_NOT_EMPTY BIT_2
1438 #define DUMP_REQUEST_REGISTER BIT_2
1583 #define IDC_REQ_DEST_FUNC_2_MASK BIT_2
2317 #define FLASH512S BIT_2
2450 #define FLT_ATTR_NEED_DATA_REALOAD BIT_2
H A Dqlge.h236 #define INIT_DOORBELL_REGS_SETUP BIT_2
630 #define CFG_RX_COPY_MODE BIT_2
/titanic_50/usr/src/uts/common/io/skd/
H A Dskd.h68 #define BIT_2 0x00004 macro
/titanic_50/usr/src/uts/common/io/fibre-channel/fca/fcoei/
H A Dfcoei_eth.c991 (FCOE_B2V_4(src + offset) & BIT_2) ? 1 : 0; in fcoei_fill_els_fpkt_resp()
1092 (FCOE_B2V_1(src + offset) & BIT_2) ? 1 : 0; in fcoei_fill_fcp_resp()
/titanic_50/usr/src/uts/common/io/comstar/port/fcoet/
H A Dfcoet_eth.c586 } else if (tm & BIT_2) { in fcoet_process_unsol_fcp_cmd()
H A Dfcoet_fc.c795 ffr->ffr_flags[0] |= BIT_2; in fcoet_send_status()
/titanic_50/usr/src/uts/common/io/comstar/lu/stmf_sbd/
H A Dsbd_scsi.c2059 if (buf[2] & BIT_2) { in sbd_handle_mode_select_xfer()
2073 if (buf[2] & BIT_2) { in sbd_handle_mode_select_xfer()
2086 if (buf[2] & BIT_2) { in sbd_handle_mode_select_xfer()
/titanic_50/usr/src/uts/common/io/fibre-channel/fca/emlxs/
H A Demlxs_fct.c2466 } else if (tm & BIT_2) {