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Searched refs:ASI_SDB_INTR_W (Results 1 – 2 of 2) sorted by relevance

/titanic_50/usr/src/uts/sun4u/sys/
H A Dmachasi.h65 #define ASI_SDB_INTR_W 0x77 /* interrupt vector dispatch */ macro
67 #define ASI_INTR_DISPATCH ASI_SDB_INTR_W
/titanic_50/usr/src/uts/sun4u/cpu/
H A Dspitfire_asm.s1141 stxa %g1, [%g4]ASI_SDB_INTR_W ! clear sdb reg UE error bit
1151 stxa %g1, [%g4]ASI_SDB_INTR_W ! clear sdb reg UE error bit
1197 stxa %o1, [%o4]ASI_SDB_INTR_W ! clear sdb reg UE,CE error bits
1205 stxa %o1, [%o4]ASI_SDB_INTR_W ! clear sdb reg UE,CE error bits