Home
last modified time | relevance | path

Searched refs:ASI_ITLB_IN (Results 1 – 6 of 6) sorted by relevance

/titanic_50/usr/src/uts/sun4u/sys/
H A Dmachasi.h94 #define ASI_ITLB_IN 0x54 /* immu tlb data in */ macro
/titanic_50/usr/src/uts/sun4u/vm/
H A Dmach_sfmmu_asm.s197 ! displaced when a new TTE is loaded via ASI_ITLB_IN. To avoid
H A Dmach_sfmmu.h216 stxa tte, [%g0]ASI_ITLB_IN
/titanic_50/usr/src/uts/sun4u/starcat/ml/
H A Ddrmach_asm.s621 stxa %g3, [%g0]ASI_ITLB_IN
/titanic_50/usr/src/uts/sun4u/ml/
H A Dtrap_table.s1183 stxa %g5, [%g0]ASI_ITLB_IN /* trapstat expects %g5 */ ;\
1223 stxa %g5, [%g0]ASI_ITLB_IN /* trapstat expects %g5 */ ;\
/titanic_50/usr/src/uts/sun4u/cpu/
H A Dus3_common_asm.s3129 ! loaded via ASI_ITLB_IN. In order to avoid cheetah+ erratum 34,