| /titanic_44/usr/src/uts/i86pc/os/ |
| H A D | fpu_subr.c | 151 if (is_x86_feature(x86_featureset, X86FSET_SSE) && in fpu_probe()
152 is_x86_feature(x86_featureset, X86FSET_SSE2)) { in fpu_probe()
156 if (is_x86_feature(x86_featureset, X86FSET_AVX)) { in fpu_probe()
157 ASSERT(is_x86_feature(x86_featureset, in fpu_probe()
162 if (is_x86_feature(x86_featureset, X86FSET_XSAVE)) { in fpu_probe()
173 if (is_x86_feature(x86_featureset, X86FSET_SSE)) { in fpu_probe()
179 if (is_x86_feature(x86_featureset, X86FSET_SSE2)) { in fpu_probe()
183 if (is_x86_feature(x86_featureset, X86FSET_AVX)) { in fpu_probe()
184 ASSERT(is_x86_feature(x86_featureset, in fpu_probe()
189 if (is_x86_feature(x86_featureset, X86FSET_XSAVE)) { in fpu_probe()
[all …]
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| H A D | mlsetup.c | 183 cpuid_pass1(cpu[0], x86_featureset); in mlsetup()
207 is_x86_feature(x86_featureset, X86FSET_TSC)) { in mlsetup()
231 is_x86_feature(x86_featureset, X86FSET_TSCP)) in mlsetup()
235 is_x86_feature(x86_featureset, X86FSET_SSE2)) in mlsetup()
239 is_x86_feature(x86_featureset, X86FSET_SSE2)) in mlsetup()
250 if (!is_x86_feature(x86_featureset, X86FSET_TSC)) in mlsetup()
267 if (is_x86_feature(x86_featureset, X86FSET_TSC)) in mlsetup()
270 if (is_x86_feature(x86_featureset, X86FSET_TSCP)) in mlsetup()
276 if (is_x86_feature(x86_featureset, X86FSET_DE)) in mlsetup()
279 if (is_x86_feature(x86_featureset, X86FSET_SMEP)) in mlsetup()
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| H A D | mp_startup.c | 172 if (is_x86_feature(x86_featureset, X86FSET_MSR) && in init_cpu_syscall()
173 is_x86_feature(x86_featureset, X86FSET_ASYSC)) { in init_cpu_syscall()
213 if (is_x86_feature(x86_featureset, X86FSET_MSR) && in init_cpu_syscall()
214 is_x86_feature(x86_featureset, X86FSET_SEP)) { in init_cpu_syscall()
437 if (is_x86_feature(x86_featureset, X86FSET_MWAIT) && in mp_cpu_configure_common()
1173 } else if (is_x86_feature(x86_featureset, X86FSET_SSE2)) { in workaround_errata()
1191 } else if (is_x86_feature(x86_featureset, X86FSET_SSE2) && in workaround_errata()
1707 if (is_x86_feature(x86_featureset, X86FSET_TSCP)) in mp_startup_common()
1735 if (compare_x86_featureset(x86_featureset, new_x86_featureset) == in mp_startup_common()
1746 if (is_x86_feature(x86_featureset, X86FSET_MWAIT) != in mp_startup_common()
[all …]
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| H A D | cpuid.c | 127 uchar_t x86_featureset[BT_SIZEOFMAP(NUM_X86_FEATURES)]; variable
859 if (is_x86_feature(x86_featureset, X86FSET_TOPOEXT) && in cpuid_amd_getids()
934 ASSERT(is_x86_feature(x86_featureset, X86FSET_XSAVE)); in setup_xfem()
936 if (is_x86_feature(x86_featureset, X86FSET_SSE)) in setup_xfem()
939 if (is_x86_feature(x86_featureset, X86FSET_AVX)) in setup_xfem()
1992 if (is_x86_feature(x86_featureset, X86FSET_XSAVE)) { in cpuid_pass2()
2026 remove_x86_feature(x86_featureset, in cpuid_pass2()
2028 remove_x86_feature(x86_featureset, in cpuid_pass2()
2030 remove_x86_feature(x86_featureset, in cpuid_pass2()
2032 remove_x86_feature(x86_featureset, in cpuid_pass2()
[all …]
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| H A D | mp_machdep.c | 240 if (is_x86_feature(x86_featureset, X86FSET_HTT)) { in pg_plat_hw_shared()
259 if (is_x86_feature(x86_featureset, X86FSET_CMP) || in pg_plat_hw_shared()
260 is_x86_feature(x86_featureset, X86FSET_HTT)) in pg_plat_hw_shared()
1034 if (is_x86_feature(x86_featureset, X86FSET_MWAIT) && in mach_init()
1148 if (is_x86_feature(x86_featureset, X86FSET_MWAIT) && in mach_smpinit()
1258 if (is_x86_feature(x86_featureset, X86FSET_TSC)) { in mach_getcpufreq()
1430 if (!is_x86_feature(x86_featureset, X86FSET_TSC) || (cpu_freq == 0)) in mach_clkinit()
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| H A D | startup.c | 1435 print_x86_featureset(x86_featureset); in startup_kmem()
1660 is_x86_feature(x86_featureset, X86FSET_MCA)) in startup_modules()
1672 is_x86_feature(x86_featureset, X86FSET_MCA)) { in startup_modules()
2730 if (!is_x86_feature(x86_featureset, X86FSET_PAT)) in pat_sync()
3139 if (is_x86_feature(x86_featureset, X86FSET_CMOV)) { in setx86isalist()
3145 is_x86_feature(x86_featureset, X86FSET_MMX) ? in setx86isalist()
3154 if (is_x86_feature(x86_featureset, X86FSET_CPUID)) { in setx86isalist()
3157 is_x86_feature(x86_featureset, X86FSET_MMX) ? in setx86isalist()
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| H A D | pci_mech1_amd.c | 45 if (!is_x86_feature(x86_featureset, X86FSET_CPUID)) in pci_check_amd_ioecs()
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| H A D | machdep.c | 1164 if (!is_x86_feature(x86_featureset, X86FSET_MSR)) in checked_rdmsr()
1177 if (!is_x86_feature(x86_featureset, X86FSET_MSR)) in checked_wrmsr()
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| H A D | fastboot.c | 603 if (is_x86_feature(x86_featureset, X86FSET_PAE)) { in fastboot_init_fields()
1157 if (!is_x86_feature(x86_featureset, in fastboot_load_kernel()
1159 !is_x86_feature(x86_featureset, in fastboot_load_kernel()
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| H A D | mp_pc.c | 628 if (is_x86_feature(x86_featureset, X86FSET_MCA)) in mp_cpu_poweroff()
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| /titanic_44/usr/src/uts/i86pc/os/cpupm/ |
| H A D | pwrnow.c | 240 if (!is_x86_feature(x86_featureset, X86FSET_CPUID) || in pwrnow_supported()
241 !is_x86_feature(x86_featureset, X86FSET_MSR)) { in pwrnow_supported()
279 if (!is_x86_feature(x86_featureset, X86FSET_CPUID) || in pwrnow_cpb_supported()
280 !is_x86_feature(x86_featureset, X86FSET_MSR)) { in pwrnow_cpb_supported()
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| H A D | speedstep.c | 270 if (!is_x86_feature(x86_featureset, X86FSET_CPUID) || in speedstep_supported()
271 !is_x86_feature(x86_featureset, X86FSET_MSR)) { in speedstep_supported()
302 if (!is_x86_feature(x86_featureset, X86FSET_CPUID) || in speedstep_turbo_supported()
303 !is_x86_feature(x86_featureset, X86FSET_MSR)) { in speedstep_turbo_supported()
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| /titanic_44/usr/src/uts/common/io/drm/ |
| H A D | drm_cache.c | 60 if (is_x86_feature(x86_featureset, X86FSET_CLFSH)) { in drm_clflush_pages()
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| /titanic_44/usr/src/uts/i86pc/ml/ |
| H A D | mpcore.s | 317 bt $X86FSET_NX, x86_featureset(%rip)
416 bt $X86FSET_NX, x86_featureset
507 bt $X86FSET_NX, x86_featureset
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| /titanic_44/usr/src/uts/i86pc/cpu/amd_opteron/ |
| H A D | ao_main.c | 67 if (!is_x86_feature(x86_featureset, X86FSET_MCA)) in ao_ms_init()
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| /titanic_44/usr/src/common/hdcrc/ |
| H A D | hd_crc.h | 250 if (!is_x86_feature(x86_featureset, X86FSET_SSE4_2)) { in hd_crc32_avail()
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| /titanic_44/usr/src/uts/intel/ia32/os/ |
| H A D | cpc_subr.c | 121 if (is_x86_feature(x86_featureset, X86FSET_HTT)) { in kcpc_hw_init()
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| H A D | desctbls.c | 1339 if (is_x86_feature(x86_featureset, X86FSET_ASYSC)) { in brand_interpositioning_enable()
1347 if (is_x86_feature(x86_featureset, X86FSET_SEP)) in brand_interpositioning_enable()
1383 if (is_x86_feature(x86_featureset, X86FSET_ASYSC)) { in brand_interpositioning_disable()
1391 if (is_x86_feature(x86_featureset, X86FSET_SEP)) in brand_interpositioning_disable()
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| /titanic_44/usr/src/uts/common/io/ |
| H A D | cpuid_drv.c | 116 if (!is_x86_feature(x86_featureset, X86FSET_CPUID)) in cpuid_read()
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| /titanic_44/usr/src/uts/i86pc/io/pcplusmp/ |
| H A D | apic_regops.c | 241 return (is_x86_feature(x86_featureset, X86FSET_X2APIC)); in apic_detect_x2apic()
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| /titanic_44/usr/src/uts/intel/ia32/ml/ |
| H A D | float.s | 617 bt $X86FSET_AVX, x86_featureset
649 bt $X86FSET_AVX, x86_featureset
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| /titanic_44/usr/src/common/bignum/i386/ |
| H A D | bignum_i386_asm.s | 181 / cpuid instruction in the kernel, we use x86_featureset,
186 / the variable, x86_featureset is not readily available to
195 bt $X86FSET_SSE2, x86_featureset
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| /titanic_44/usr/src/uts/intel/ia32/sys/ |
| H A D | traptrace.h | 248 btl $X86FSET_TSC, x86_featureset; \
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| /titanic_44/usr/src/uts/intel/pcbe/ |
| H A D | p4_pcbe.c | 502 if (is_x86_feature(x86_featureset, X86FSET_MMX)) in p4_pcbe_init()
508 if (is_x86_feature(x86_featureset, X86FSET_HTT)) in p4_pcbe_init()
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| /titanic_44/usr/src/uts/i86pc/cpu/genuineintel/ |
| H A D | gintel_main.c | 115 if (!is_x86_feature(x86_featureset, X86FSET_MCA)) in gintel_init()
|