Searched refs:sarea_priv (Results 1 – 8 of 8) sorted by relevance
763 x += dev_priv->sarea_priv->boxes[0].x1; in radeon_clear_box()764 y += dev_priv->sarea_priv->boxes[0].y1; in radeon_clear_box()863 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; in radeon_cp_dispatch_clear() local865 int nbox = sarea_priv->nbox; in radeon_cp_dispatch_clear()866 drm_clip_rect_t *pbox = sarea_priv->boxes; in radeon_cp_dispatch_clear()901 dev_priv->sarea_priv->ctx_owner = 0; in radeon_cp_dispatch_clear()981 dev_priv->sarea_priv->ctx_owner = 0; in radeon_cp_dispatch_clear()1269 dev_priv->sarea_priv->ctx_owner = 0; in radeon_cp_dispatch_clear()1277 radeon_emit_clip_rect(dev_priv, &sarea_priv->boxes[i]); in radeon_cp_dispatch_clear()1343 dev_priv->sarea_priv->ctx_owner = 0; in radeon_cp_dispatch_clear()[all …]
169 dev_priv->sarea_priv = NULL; in i915_dma_cleanup()188 dev_priv->sarea_priv = (drm_i915_sarea_t *)(uintptr_t) in i915_initialize()224 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; in i915_initialize()466 if (dev_priv->sarea_priv) in i915_emit_breadcrumb()467 dev_priv->sarea_priv->last_enqueue = dev_priv->counter; in i915_emit_breadcrumb()567 if (!dev_priv->sarea_priv) in i915_dispatch_flip()571 planes, dev_priv->sarea_priv->pf_current_page); in i915_dispatch_flip()598 dev_priv->sarea_priv->last_enqueue = dev_priv->counter++; in i915_dispatch_flip()607 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; in i915_dispatch_flip()649 drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *) in i915_batchbuffer() local[all …]
456 if (dev_priv->sarea_priv) { in igdng_irq_handler()457 dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); in igdng_irq_handler()503 if (dev_priv->sarea_priv) { in i915_driver_irq_handler()505 dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); in i915_driver_irq_handler()570 if (dev_priv->sarea_priv) in i915_emit_irq()571 dev_priv->sarea_priv->last_enqueue = dev_priv->counter; in i915_emit_irq()657 if (dev_priv->sarea_priv) { in i915_wait_irq()658 dev_priv->sarea_priv->last_dispatch = in i915_wait_irq()679 if (dev_priv->sarea_priv) in i915_wait_irq()680 dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); in i915_wait_irq()
59 drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv; in mark_block() local73 age = ++sarea_priv->texAge; in mark_block()74 list = sarea_priv->texList; in mark_block()
224 drm_radeon_sarea_t *sarea_priv; member1104 drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv; \1105 if (sarea_priv->last_dispatch >= RADEON_MAX_VB_AGE) { \1109 sarea_priv->last_dispatch = 0; \
1223 dev_priv->sarea_priv->last_frame = dev_priv->scratch[0] = 0; in radeon_cp_init_ring_buffer()1224 RADEON_WRITE(RADEON_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame); in radeon_cp_init_ring_buffer()1226 dev_priv->sarea_priv->last_dispatch = dev_priv->scratch[1] = 0; in radeon_cp_init_ring_buffer()1228 dev_priv->sarea_priv->last_dispatch); in radeon_cp_init_ring_buffer()1230 dev_priv->sarea_priv->last_clear = dev_priv->scratch[2] = 0; in radeon_cp_init_ring_buffer()1231 RADEON_WRITE(RADEON_LAST_CLEAR_REG, dev_priv->sarea_priv->last_clear); in radeon_cp_init_ring_buffer()1526 dev_priv->sarea_priv = (drm_radeon_sarea_t *)(uintptr_t) in radeon_do_init_cp()
737 buf_priv->age = ++dev_priv->sarea_priv->last_dispatch; in r300_discard_buffer()980 RADEON_DISPATCH_AGE(dev_priv->sarea_priv->last_dispatch); in r300_do_cp_cmdbuf()
222 drm_i915_sarea_t *sarea_priv; member