Searched refs:reg_set (Results 1 – 5 of 5) sorted by relevance
/titanic_44/usr/src/uts/common/io/1394/adapters/ |
H A D | hci1394_vendor.c | 251 uint_t reg_set, uint_t offset, uint32_t data) in hci1394_vendor_reg_write() argument 261 if (vendor_handle->ve_reg_count < (reg_set + 1)) { in hci1394_vendor_reg_write() 270 venreg = vendor_handle->ve_reg_array[reg_set]; in hci1394_vendor_reg_write() 292 hci1394_vendor_reg_read(hci1394_vendor_handle_t vendor_handle, uint_t reg_set, in hci1394_vendor_reg_read() argument 304 if (vendor_handle->ve_reg_count < (reg_set + 1)) { in hci1394_vendor_reg_read() 313 venreg = vendor_handle->ve_reg_array[reg_set]; in hci1394_vendor_reg_read()
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/titanic_44/usr/src/uts/common/sys/1394/adapters/ |
H A D | hci1394_vendor.h | 117 uint_t reg_set, uint_t offset, uint32_t data); 119 uint_t reg_set, uint_t offset, uint32_t *data);
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/titanic_44/usr/src/uts/common/io/bnxe/577xx/common/ |
H A D | bnxe_clc.c | 3934 static struct elink_reg_set reg_set[] = { in elink_warpcore_enable_AN_KR2() local 3958 for (i = 0; i < ARRAY_SIZE(reg_set); i++) in elink_warpcore_enable_AN_KR2() 3959 elink_cl45_write(cb, phy, reg_set[i].devad, reg_set[i].reg, in elink_warpcore_enable_AN_KR2() 3960 reg_set[i].val); in elink_warpcore_enable_AN_KR2() 3973 static struct elink_reg_set reg_set[] = { in elink_disable_kr2() local 3993 for (i = 0; i < ARRAY_SIZE(reg_set); i++) in elink_disable_kr2() 3994 elink_cl45_write(cb, phy, reg_set[i].devad, reg_set[i].reg, in elink_disable_kr2() 3995 reg_set[i].val); in elink_disable_kr2() 4035 static struct elink_reg_set reg_set[] = { in elink_warpcore_enable_AN_KR() local 4047 for (i = 0; i < ARRAY_SIZE(reg_set); i++) in elink_warpcore_enable_AN_KR() [all …]
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/titanic_44/usr/src/uts/common/io/myri10ge/drv/ |
H A D | myri10ge_var.h | 468 int reg_set; member
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H A D | myri10ge.c | 1044 myri10ge_reg_set(dev_info_t *dip, int *reg_set, int *span, in myri10ge_reg_set() argument 1116 *reg_set = i; in myri10ge_reg_set() 1120 address_space_name[ADDRESS_SPACE(rs)], *reg_set); in myri10ge_reg_set() 4278 int reg_set, span; in myri10ge_enable_nvidia_ecrc() local 4279 (void) myri10ge_reg_set(parent_dip, ®_set, &span, in myri10ge_enable_nvidia_ecrc() 5893 (void) myri10ge_reg_set(dip, &mgp->reg_set, &span, &bus_number, in myri10ge_attach() 5898 status = ddi_regs_map_setup(dip, mgp->reg_set, (caddr_t *)&mgp->sram, in myri10ge_attach() 5904 mgp->name, mgp->reg_set, span, status); in myri10ge_attach()
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